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AgeCommit message (Expand)Author
2024-05-11[heavy_opt/riscv64] Fix load of 64-bit csrPaul Daniel Faria
2024-03-18Merge "[heavy_optimizer/riscv64] Support fence insn" into mainTreehugger Robot
2024-03-18[heavy_optimizer/riscv64] Support fence insnPaul Daniel Faria
2024-03-13[intrinsics] Support div in lite and heavy translatorsPaul Daniel Faria
2024-01-15Replace typedef with using.Mohamed Elbashir Younes Snosy
2023-12-21[intrinsics] Emit mem and FCsr full supportPaul Daniel Faria
2023-12-21[heavy_optimizer/riscv64] Support mem_argsPaul Daniel Faria
2023-12-21[backend] Mem helper templatesPaul Daniel Faria
2023-12-21[heavy_optimizer/riscv64] Add remaining Fp insnsPaul Daniel Faria
2023-12-21[backend][heavy_optimizer/riscv64] Use Fp regsPaul Daniel Faria
2023-12-21[backend] Remove Offset functions for Gen{Get,Put}Paul Daniel Faria
2023-12-21[backend] Soft transition Gen{Get,Put}OffsetPaul Daniel Faria
2023-12-21[backend][heavy_optimizer/riscv64] Use offset accessorsPaul Daniel Faria
2023-12-21[backend][heavy_optimizer] Support most CSRsPaul Daniel Faria
2023-12-20[heavy_optimizer/riscv64] Extract simple Load/StorePaul Daniel Faria
2023-11-21[backend][heavy_optimizer] Support mov for simd regsPaul Daniel Faria
2023-11-21[backend] Add I?Divl and IMull to IRPaul Daniel Faria
2023-11-21[backend] Add lir variants for Andn, I?Mul, I?DivPaul Daniel Faria
2023-11-21[berberis] Add TODOs for tech debtPaul Daniel Faria
2023-11-20[backend] Fix src in wrong targetPaul Daniel Faria
2023-11-04backend: add FoldWriteFlagsLev Rumyantsev
2023-11-04backend: add pseudo-flags-read/write testsLev Rumyantsev
2023-11-02backend: add sanity checks for Get/SetRegAt in MachineInsnLev Rumyantsev
2023-10-26Merge "loop-opt: Separate limit for simd regs" into mainTreehugger Robot
2023-10-26loop-opt: Separate limit for simd regsLev Rumyantsev
2023-10-25loop-opt: add tests for guest flagsLev Rumyantsev
2023-10-12Replace arraysize with std::sizeVictor Khimenko
2023-10-06backend: fix forwarder block removalLev Rumyantsev
2023-09-28[backend] Add templated MachineInsn definitionPaul Daniel Faria
2023-09-28[intrinsics] Add additional metadata to typesPaul Daniel Faria
2023-09-08Move config.h from runtime_primitives to base.Victor Khimenko
2023-09-08Implement Csr instructions for lite translatorVictor Khimenko
2023-08-30[backend] Generate codePaul Daniel Faria
2023-08-30[backend] Rename vregsPaul Daniel Faria
2023-08-30[backend] Rename copy usesPaul Daniel Faria
2023-08-30[backend] Add instruction foldingPaul Daniel Faria
2023-08-30[backend] Optimize loop guest contextPaul Daniel Faria
2023-08-30[backend] Optimize local guest contextPaul Daniel Faria
2023-08-30[backend] Add machine ir optimizationsPaul Daniel Faria
2023-08-30[backend] Add common machine ir optsPaul Daniel Faria
2023-08-30[backend] Rename vreg localsPaul Daniel Faria
2023-08-30[backend] Add liveness analyzerPaul Daniel Faria
2023-08-30[backend] Add vreg bitsetPaul Daniel Faria
2023-08-30[backend] Add machine ir analysisPaul Daniel Faria
2023-08-30[backend] Add context_liveness_analyzerPaul Daniel Faria
2023-08-30[backend] Add machine_ir_exec_testPaul Daniel Faria
2023-08-17[backend] Make test target guest agnosticPaul Daniel Faria
2023-08-17[backend] Add register allocationPaul Daniel Faria
2023-08-17[backend] Add lifetime analysisPaul Daniel Faria
2023-08-17[backend] Add common lifetime defsPaul Daniel Faria
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-30 14:22:01 +0000