diff options
-rw-r--r-- | backend/x86_64/lir_instructions.json | 1 | ||||
-rw-r--r-- | heavy_optimizer/riscv64/frontend.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/backend/x86_64/lir_instructions.json b/backend/x86_64/lir_instructions.json index 663305c2..ba093ff1 100644 --- a/backend/x86_64/lir_instructions.json +++ b/backend/x86_64/lir_instructions.json @@ -31,6 +31,7 @@ "AddpdXRegXReg", "AddpsXRegXReg", "AndqRegImm", + "AndqRegMemInsns", "AndqRegReg", "BtqRegImm", "Cmc", diff --git a/heavy_optimizer/riscv64/frontend.h b/heavy_optimizer/riscv64/frontend.h index 30c5e149..17de50c8 100644 --- a/heavy_optimizer/riscv64/frontend.h +++ b/heavy_optimizer/riscv64/frontend.h @@ -376,7 +376,7 @@ class HeavyOptimizerFrontend { Gen<x86_64::AndbRegImm>(tmp, kCsrMask<kName>, GetFlagsRegister()); Gen<x86_64::MovbMemBaseDispReg>(x86_64::kMachineRegRBP, kCsrFieldOffset<kName>, tmp); } else if constexpr (sizeof(CsrFieldType<kName>) == 8) { - Gen<x86_64::AndqRegImm>( + Gen<x86_64::AndqRegMemAbsolute>( tmp, constants_pool::kConst<uint64_t{kCsrMask<kName>}>, GetFlagsRegister()); Gen<x86_64::MovqMemBaseDispReg>(x86_64::kMachineRegRBP, kCsrFieldOffset<kName>, tmp); } else { |