diff options
author | Paul Daniel Faria <paulfaria@google.com> | 2024-04-29 18:26:03 +0000 |
---|---|---|
committer | Paul Daniel Faria <paulfaria@google.com> | 2024-04-29 18:26:03 +0000 |
commit | 64a83f4bbf7e8c99995edb8db241bcae804bffa1 (patch) | |
tree | 7c1ca64d7f8f1d0ce96e39b39a942d027828ce96 | |
parent | bc5c5cb9fa1a33afa90e41b45f64a1259909c410 (diff) | |
download | binary_translation-64a83f4bbf7e8c99995edb8db241bcae804bffa1.tar.gz |
[interpreter/riscv64] Do not mask alignment check
Fix bug that caused valid insn to be marked undefined.
Test: m berberis_all berberis_run_host_tests
Change-Id: Idb53ff07942a03e66cc8ad4a608eae94b1d54d3a
-rw-r--r-- | interpreter/riscv64/interpreter.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/interpreter/riscv64/interpreter.h b/interpreter/riscv64/interpreter.h index a6fd3f56..6543e185 100644 --- a/interpreter/riscv64/interpreter.h +++ b/interpreter/riscv64/interpreter.h @@ -2940,7 +2940,7 @@ class Interpreter { void OpVectorToMask(uint8_t dst, Args... args) { // All args, except dst must be aligned at kRegistersInvolved amount. We'll merge them // together and then do a combined check for all of them at once. - if (!IsAligned<kRegistersInvolved>(OrValuesOnlyForType<Vec>(args...) | dst)) { + if (!IsAligned<kRegistersInvolved>(OrValuesOnlyForType<Vec>(args...))) { return Undefined(); } SIMD128Register original_result(state_->cpu.v[dst]); |