Upgrade gdbstub_arch to 0.3.0

This project was upgraded with external_updater.
Usage: tools/external_updater/updater.sh update rust/crates/gdbstub_arch
For more info, check https://cs.android.com/android/platform/superproject/+/main:tools/external_updater/README.md

Test: TreeHugger
Change-Id: I56dfdbd9d2e0a0d99cedf13380b38704caf2973d

27 files changed, 54 insertions, 125 deletions

diff --git a/.cargo_vcs_info.json b/.cargo_vcs_info.json
index d77758c..91844c6 100644
--- a/.cargo_vcs_info.json
+++ b/.cargo_vcs_info.json
@@ -1,6 +1,6 @@
 {
   "git": {
-    "sha1": "eb9d7be4a4095440171986b41d6ffc9fb3be1d74"
+    "sha1": "c489dcdf5992d6e7ebfcf37775ce81dc8cf7861d"
   },
   "path_in_vcs": "gdbstub_arch"
 }
\ No newline at end of file
diff --git a/Android.bp b/Android.bp
index feca296..5cdd0a3 100644
--- a/Android.bp
+++ b/Android.bp
@@ -23,7 +23,7 @@ rust_test {
     host_supported: true,
     crate_name: "gdbstub_arch",
     cargo_env_compat: true,
-    cargo_pkg_version: "0.2.4",
+    cargo_pkg_version: "0.3.0",
     srcs: ["src/lib.rs"],
     test_suites: ["general-tests"],
     auto_gen_config: true,
@@ -42,7 +42,7 @@ rust_library {
     host_supported: true,
     crate_name: "gdbstub_arch",
     cargo_env_compat: true,
-    cargo_pkg_version: "0.2.4",
+    cargo_pkg_version: "0.3.0",
     srcs: ["src/lib.rs"],
     edition: "2018",
     rustlibs: [
diff --git a/CHANGELOG.md b/CHANGELOG.md
index ae6d63f..2c5a96a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,6 +2,12 @@ All notable changes to this project will be documented in this file.
 
 This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+# 0.3.0
+
+#### Breaking Arch Changes
+
+- Entirely removed `SingleStepGdbBehavior` APIs
+
 # 0.2.4
 
 - Add support for AArch64 [\#109](https://github.com/daniel5151/gdbstub/pull/109) ([ptosi](https://github.com/ptosi))
diff --git a/Cargo.toml b/Cargo.toml
index f195a38..0e3562d 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -12,7 +12,7 @@
 [package]
 edition = "2018"
 name = "gdbstub_arch"
-version = "0.2.4"
+version = "0.3.0"
 authors = ["Daniel Prilik <danielprilik@gmail.com>"]
 description = "Implementations of `gdbstub::arch::Arch` for various architectures."
 homepage = "https://github.com/daniel5151/gdbstub"
@@ -34,7 +34,7 @@ license = "MIT OR Apache-2.0"
 repository = "https://github.com/daniel5151/gdbstub"
 
 [dependencies.gdbstub]
-version = "0.6"
+version = "0.7"
 default-features = false
 
 [dependencies.num-traits]
diff --git a/Cargo.toml.orig b/Cargo.toml.orig
index 56fec5c..554d918 100644
--- a/Cargo.toml.orig
+++ b/Cargo.toml.orig
@@ -2,7 +2,7 @@
 name = "gdbstub_arch"
 description = "Implementations of `gdbstub::arch::Arch` for various architectures."
 authors = ["Daniel Prilik <danielprilik@gmail.com>"]
-version = "0.2.4"
+version = "0.3.0"
 license = "MIT OR Apache-2.0"
 edition = "2018"
 readme = "README.md"
@@ -13,6 +13,6 @@ keywords = ["gdb", "emulation", "no_std", "debugging"]
 categories = ["development-tools::debugging", "embedded", "emulators", "no-std"]
 
 [dependencies]
-gdbstub = { path = "../", version = "0.6", default-features = false }
+gdbstub = { path = "../", version = "0.7", default-features = false }
 
 num-traits = { version = "0.2", default-features = false }
diff --git a/METADATA b/METADATA
index 24787ac..daad820 100644
--- a/METADATA
+++ b/METADATA
@@ -1,19 +1,20 @@
+# This project was upgraded with external_updater.
+# Usage: tools/external_updater/updater.sh update rust/crates/gdbstub_arch
+# For more info, check https://cs.android.com/android/platform/superproject/+/main:tools/external_updater/README.md
+
 name: "gdbstub_arch"
 description: "Implementations of `gdbstub::arch::Arch` for various architectures."
 third_party {
-  url {
-    type: HOMEPAGE
-    value: "https://crates.io/crates/gdbstub_arch"
-  }
-  url {
-    type: ARCHIVE
-    value: "https://static.crates.io/crates/gdbstub_arch/gdbstub_arch-0.2.4.crate"
-  }
-  version: "0.2.4"
   license_type: NOTICE
   last_upgrade_date {
-    year: 2022
-    month: 8
-    day: 22
+    year: 2023
+    month: 12
+    day: 16
+  }
+  homepage: "https://crates.io/crates/gdbstub_arch"
+  identifier {
+    type: "Archive"
+    value: "https://static.crates.io/crates/gdbstub_arch/gdbstub_arch-0.3.0.crate"
+    version: "0.3.0"
   }
 }
diff --git a/src/aarch64/mod.rs b/src/aarch64/mod.rs
index b5d0052..7f8f5bf 100644
--- a/src/aarch64/mod.rs
+++ b/src/aarch64/mod.rs
@@ -7,7 +7,7 @@
 //! *Note*: the target XML currently advertises all system registers to the GDB
 //! client.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -32,9 +32,4 @@ impl Arch for AArch64 {
 
         Some(DESCRIPTION_XML)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
diff --git a/src/aarch64/reg/aarch64_core.rs b/src/aarch64/reg/aarch64_core.rs
index 083c8c1..e72f596 100644
--- a/src/aarch64/reg/aarch64_core.rs
+++ b/src/aarch64/reg/aarch64_core.rs
@@ -1,5 +1,4 @@
 use core::convert::TryInto;
-
 use gdbstub::arch::Registers;
 
 /// AArch64 core registers.
diff --git a/src/aarch64/reg/id.rs b/src/aarch64/reg/id.rs
index 3d4acc1..c10e6ce 100644
--- a/src/aarch64/reg/id.rs
+++ b/src/aarch64/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// AArch64 Architectural Registers.
@@ -184,25 +183,25 @@ impl AArch64RegId {
     pub const TTBR1_EL1: Self = Self::System(0b11_000_0010_0000_001);
     /// Translation Control Register (EL1)
     pub const TCR_EL1: Self = Self::System(0b11_000_0010_0000_010);
-    /// Pointer Authentication Key A For Instruction (bits[63:0])
+    /// Pointer Authentication Key A For Instruction (bits\[63:0])
     pub const APIAKEYLO_EL1: Self = Self::System(0b11_000_0010_0001_000);
-    /// Pointer Authentication Key A For Instruction (bits[127:64])
+    /// Pointer Authentication Key A For Instruction (bits\[127:64])
     pub const APIAKEYHI_EL1: Self = Self::System(0b11_000_0010_0001_001);
-    /// Pointer Authentication Key B For Instruction (bits[63:0])
+    /// Pointer Authentication Key B For Instruction (bits\[63:0])
     pub const APIBKEYLO_EL1: Self = Self::System(0b11_000_0010_0001_010);
-    /// Pointer Authentication Key B For Instruction (bits[127:64])
+    /// Pointer Authentication Key B For Instruction (bits\[127:64])
     pub const APIBKEYHI_EL1: Self = Self::System(0b11_000_0010_0001_011);
-    /// Pointer Authentication Key A For Data (bits[63:0])
+    /// Pointer Authentication Key A For Data (bits\[63:0])
     pub const APDAKEYLO_EL1: Self = Self::System(0b11_000_0010_0010_000);
-    /// Pointer Authentication Key A For Data (bits[127:64])
+    /// Pointer Authentication Key A For Data (bits\[127:64])
     pub const APDAKEYHI_EL1: Self = Self::System(0b11_000_0010_0010_001);
-    /// Pointer Authentication Key B For Data (bits[63:0])
+    /// Pointer Authentication Key B For Data (bits\[63:0])
     pub const APDBKEYLO_EL1: Self = Self::System(0b11_000_0010_0010_010);
-    /// Pointer Authentication Key B For Data (bits[127:64])
+    /// Pointer Authentication Key B For Data (bits\[127:64])
     pub const APDBKEYHI_EL1: Self = Self::System(0b11_000_0010_0010_011);
-    /// Pointer Authentication Key A For Code (bits[63:0])
+    /// Pointer Authentication Key A For Code (bits\[63:0])
     pub const APGAKEYLO_EL1: Self = Self::System(0b11_000_0010_0011_000);
-    /// Pointer Authentication Key A For Code (bits[127:64])
+    /// Pointer Authentication Key A For Code (bits\[127:64])
     pub const APGAKEYHI_EL1: Self = Self::System(0b11_000_0010_0011_001);
     /// Saved Program Status Register (EL1)
     pub const SPSR_EL1: Self = Self::System(0b11_000_0100_0000_000);
diff --git a/src/arm/mod.rs b/src/arm/mod.rs
index dbc915a..e3f1cef 100644
--- a/src/arm/mod.rs
+++ b/src/arm/mod.rs
@@ -1,6 +1,6 @@
 //! Implementations for various ARM architectures.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -42,9 +42,4 @@ impl Arch for Armv4t {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>armv4t</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Optional
-    }
 }
diff --git a/src/arm/reg/id.rs b/src/arm/reg/id.rs
index 3b91321..10f7c26 100644
--- a/src/arm/reg/id.rs
+++ b/src/arm/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// 32-bit ARM core register identifier.
diff --git a/src/mips/mod.rs b/src/mips/mod.rs
index 7e39cc5..24a94a7 100644
--- a/src/mips/mod.rs
+++ b/src/mips/mod.rs
@@ -1,6 +1,6 @@
 //! Implementations for the MIPS architecture.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -73,11 +73,6 @@ impl Arch for Mips {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>mips</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
 
 impl Arch for MipsWithDsp {
@@ -91,11 +86,6 @@ impl Arch for MipsWithDsp {
             r#"<target version="1.0"><architecture>mips</architecture><feature name="org.gnu.gdb.mips.dsp"></feature></target>"#,
         )
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
 
 #[allow(deprecated)]
@@ -108,11 +98,6 @@ impl Arch for Mips64 {
     fn target_description_xml() -> Option<&'static str> {
         None
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
 
 #[allow(deprecated)]
@@ -125,9 +110,4 @@ impl Arch for Mips64WithDsp {
     fn target_description_xml() -> Option<&'static str> {
         None
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
diff --git a/src/mips/reg/id.rs b/src/mips/reg/id.rs
index 99afb3f..4a80d90 100644
--- a/src/mips/reg/id.rs
+++ b/src/mips/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// MIPS register identifier.
diff --git a/src/mips/reg/mips.rs b/src/mips/reg/mips.rs
index 3e2023c..b5bd42c 100644
--- a/src/mips/reg/mips.rs
+++ b/src/mips/reg/mips.rs
@@ -1,9 +1,7 @@
 use core::convert::TryInto;
-
-use num_traits::PrimInt;
-
 use gdbstub::arch::Registers;
 use gdbstub::internal::LeBytes;
+use num_traits::PrimInt;
 
 /// MIPS registers.
 ///
diff --git a/src/msp430/mod.rs b/src/msp430/mod.rs
index dd90c6a..54b50bb 100644
--- a/src/msp430/mod.rs
+++ b/src/msp430/mod.rs
@@ -1,6 +1,6 @@
 //! Implementations for the TI-MSP430 family of MCUs.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -16,11 +16,6 @@ impl Arch for Msp430 {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>msp430</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
 
 /// Implements `Arch` for 20-bit TI-MSP430 MCUs (CPUX).
@@ -35,9 +30,4 @@ impl Arch for Msp430X {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>msp430x</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
diff --git a/src/msp430/reg/id.rs b/src/msp430/reg/id.rs
index 679c1cc..b357b06 100644
--- a/src/msp430/reg/id.rs
+++ b/src/msp430/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// TI-MSP430 register identifier.
diff --git a/src/msp430/reg/msp430.rs b/src/msp430/reg/msp430.rs
index 89f04e1..f66a0a5 100644
--- a/src/msp430/reg/msp430.rs
+++ b/src/msp430/reg/msp430.rs
@@ -1,7 +1,6 @@
-use num_traits::PrimInt;
-
 use gdbstub::arch::Registers;
 use gdbstub::internal::LeBytes;
+use num_traits::PrimInt;
 
 /// TI-MSP430 registers.
 ///
diff --git a/src/ppc/mod.rs b/src/ppc/mod.rs
index 5351ef4..60beed3 100644
--- a/src/ppc/mod.rs
+++ b/src/ppc/mod.rs
@@ -1,6 +1,7 @@
 //! Implementations for various PowerPC architectures.
 
-use gdbstub::arch::{Arch, RegId, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
+use gdbstub::arch::RegId;
 
 pub mod reg;
 
@@ -24,9 +25,4 @@ impl<RegIdImpl: RegId> Arch for PowerPcAltivec32<RegIdImpl> {
             r#"<target version="1.0"><architecture>powerpc:common</architecture><feature name="org.gnu.gdb.power.core"></feature><feature name="org.gnu.gdb.power.fpu"></feature><feature name="org.gnu.gdb.power.altivec"></feature></target>"#,
         )
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
diff --git a/src/ppc/reg/common.rs b/src/ppc/reg/common.rs
index c84a87b..a93d547 100644
--- a/src/ppc/reg/common.rs
+++ b/src/ppc/reg/common.rs
@@ -1,8 +1,6 @@
-use gdbstub::arch::Registers;
-
 use super::PpcVector;
-
 use core::convert::TryInto;
+use gdbstub::arch::Registers;
 
 /// 32-bit PowerPC core registers, FPU registers, and AltiVec SIMD registers.
 ///
diff --git a/src/riscv/mod.rs b/src/riscv/mod.rs
index d5c6c67..b086396 100644
--- a/src/riscv/mod.rs
+++ b/src/riscv/mod.rs
@@ -2,7 +2,7 @@
 //!
 //! *Note*: currently only supports integer versions of the ISA.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -21,11 +21,6 @@ impl Arch for Riscv32 {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>riscv:rv32</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
 
 impl Arch for Riscv64 {
@@ -37,9 +32,4 @@ impl Arch for Riscv64 {
     fn target_description_xml() -> Option<&'static str> {
         Some(r#"<target version="1.0"><architecture>riscv:rv64</architecture></target>"#)
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Ignored
-    }
 }
diff --git a/src/riscv/reg/id.rs b/src/riscv/reg/id.rs
index 621231e..c758bfd 100644
--- a/src/riscv/reg/id.rs
+++ b/src/riscv/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// RISC-V Register identifier.
diff --git a/src/riscv/reg/riscv.rs b/src/riscv/reg/riscv.rs
index 15075f2..4d7afaf 100644
--- a/src/riscv/reg/riscv.rs
+++ b/src/riscv/reg/riscv.rs
@@ -1,7 +1,6 @@
-use num_traits::PrimInt;
-
 use gdbstub::arch::Registers;
 use gdbstub::internal::LeBytes;
+use num_traits::PrimInt;
 
 /// RISC-V Integer registers.
 ///
diff --git a/src/x86/mod.rs b/src/x86/mod.rs
index d1c7a61..7df4531 100644
--- a/src/x86/mod.rs
+++ b/src/x86/mod.rs
@@ -1,6 +1,6 @@
 //! Implementations for various x86 architectures.
 
-use gdbstub::arch::{Arch, SingleStepGdbBehavior};
+use gdbstub::arch::Arch;
 
 pub mod reg;
 
@@ -19,11 +19,6 @@ impl Arch for X86_64_SSE {
             r#"<target version="1.0"><architecture>i386:x86-64</architecture><feature name="org.gnu.gdb.i386.sse"></feature></target>"#,
         )
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
 
 /// Implements `Arch` for 32-bit x86 + SSE Extensions.
@@ -41,9 +36,4 @@ impl Arch for X86_SSE {
             r#"<target version="1.0"><architecture>i386:intel</architecture><feature name="org.gnu.gdb.i386.sse"></feature></target>"#,
         )
     }
-
-    #[inline(always)]
-    fn single_step_gdb_behavior() -> SingleStepGdbBehavior {
-        SingleStepGdbBehavior::Required
-    }
 }
diff --git a/src/x86/reg/core32.rs b/src/x86/reg/core32.rs
index 105b380..6939f2a 100644
--- a/src/x86/reg/core32.rs
+++ b/src/x86/reg/core32.rs
@@ -1,9 +1,9 @@
+use super::X86SegmentRegs;
+use super::X87FpuInternalRegs;
+use super::F80;
 use core::convert::TryInto;
-
 use gdbstub::arch::Registers;
 
-use super::{X86SegmentRegs, X87FpuInternalRegs, F80};
-
 /// 32-bit x86 core registers (+ SSE extensions).
 ///
 /// Source: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/32bit-core.xml>
diff --git a/src/x86/reg/core64.rs b/src/x86/reg/core64.rs
index f61d2d5..e85e931 100644
--- a/src/x86/reg/core64.rs
+++ b/src/x86/reg/core64.rs
@@ -1,9 +1,9 @@
+use super::X86SegmentRegs;
+use super::X87FpuInternalRegs;
+use super::F80;
 use core::convert::TryInto;
-
 use gdbstub::arch::Registers;
 
-use super::{X86SegmentRegs, X87FpuInternalRegs, F80};
-
 /// 64-bit x86 core registers (+ SSE extensions).
 ///
 /// Source: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/64bit-core.xml>
diff --git a/src/x86/reg/id.rs b/src/x86/reg/id.rs
index d1f5462..ec2f1be 100644
--- a/src/x86/reg/id.rs
+++ b/src/x86/reg/id.rs
@@ -1,5 +1,4 @@
 use core::num::NonZeroUsize;
-
 use gdbstub::arch::RegId;
 
 /// FPU register identifier.
diff --git a/src/x86/reg/mod.rs b/src/x86/reg/mod.rs
index 6397e70..fa2ab58 100644
--- a/src/x86/reg/mod.rs
+++ b/src/x86/reg/mod.rs
@@ -1,7 +1,6 @@
 //! `Register` structs for x86 architectures.
 
 use core::convert::TryInto;
-
 use gdbstub::arch::Registers;
 
 /// `RegId` definitions for x86 architectures.