path: root/arch/arm/mach-ux500/include/mach/ab8500_codec_p.h

/*****************************************************************************/
/**
*  © ST-Ericsson, 2009 - All rights reserved
* Reproduction and Communication of this document is strictly prohibited
* unless specifically authorized in writing by ST-Ericsson
 *
* \brief   Private Header file for AB8500 CODEC
* \author  ST-Ericsson
 */
/*****************************************************************************/

#ifndef _AB8500_CODECP_H_
#define _AB8500_CODECP_H_

/*----------------------------------------------------------------------------
 * Includes
 *---------------------------------------------------------------------------*/
#include "hcl_defs.h"

#define AB8500_CODEC_HCL_VERSION_ID                    2
#define AB8500_CODEC_HCL_MAJOR_ID                      0
#define AB8500_CODEC_HCL_MINOR_ID                      0

#define AB8500_CODEC_MASK_ONE_BIT                      0x1UL
#define AB8500_CODEC_MASK_TWO_BITS                     0x3UL
#define AB8500_CODEC_MASK_THREE_BITS                   0x7UL
#define AB8500_CODEC_MASK_FOUR_BITS                    0xFUL
#define AB8500_CODEC_MASK_FIVE_BITS                    0x1FUL
#define AB8500_CODEC_MASK_SIX_BITS                     0x3FUL
#define AB8500_CODEC_MASK_SEVEN_BITS                   0x7FUL
#define AB8500_CODEC_MASK_EIGHT_BITS                   0xFFUL

#define AB8500_CODEC_WRITE_BITS(reg, val, bit_nb, pos) (reg) = ((t_uint8) ((((reg) & (~(bit_nb << pos))) | (((val) & bit_nb) << pos))))

#define AB8500_CODEC_BLOCK 0x0D

#define AB8500_CODEC_MASK_TWO_MS_BITS                     0xC0UL
#define AB8500_CODEC_MASK_SIX_LS_BITS                     0x3FUL

/*  Genepi AudioCodec Control Registers */

#define AB8500_CODEC_CR0    0x00
#define AB8500_CODEC_CR1    0x01
#define AB8500_CODEC_CR2    0x02
#define AB8500_CODEC_CR3    0x03
#define AB8500_CODEC_CR4    0x04
#define AB8500_CODEC_CR5    0x05
#define AB8500_CODEC_CR6    0x06
#define AB8500_CODEC_CR7    0x07
#define AB8500_CODEC_CR8    0x08
#define AB8500_CODEC_CR9    0x09
#define AB8500_CODEC_CR10   0x0A
#define AB8500_CODEC_CR11   0x0B
#define AB8500_CODEC_CR12   0x0C
#define AB8500_CODEC_CR13   0x0D
#define AB8500_CODEC_CR14   0x0E
#define AB8500_CODEC_CR15   0x0F
#define AB8500_CODEC_CR16   0x10
#define AB8500_CODEC_CR17   0x11
#define AB8500_CODEC_CR18   0x12
#define AB8500_CODEC_CR19   0x13
#define AB8500_CODEC_CR20   0x14
#define AB8500_CODEC_CR21   0x15
#define AB8500_CODEC_CR22   0x16
#define AB8500_CODEC_CR23   0x17
#define AB8500_CODEC_CR24   0x18
#define AB8500_CODEC_CR25   0x19
#define AB8500_CODEC_CR26   0x1A
#define AB8500_CODEC_CR27   0x1B
#define AB8500_CODEC_CR28   0x1C
#define AB8500_CODEC_CR29   0x1D
#define AB8500_CODEC_CR30   0x1E
#define AB8500_CODEC_CR31   0x1F
#define AB8500_CODEC_CR32   0x20
#define AB8500_CODEC_CR33   0x21
#define AB8500_CODEC_CR34   0x22
#define AB8500_CODEC_CR35   0x23
#define AB8500_CODEC_CR36   0x24
#define AB8500_CODEC_CR37   0x25
#define AB8500_CODEC_CR38   0x26
#define AB8500_CODEC_CR39   0x27
#define AB8500_CODEC_CR40   0x28
#define AB8500_CODEC_CR41   0x29
#define AB8500_CODEC_CR42   0x2A
#define AB8500_CODEC_CR43   0x2B
#define AB8500_CODEC_CR44   0x2C
#define AB8500_CODEC_CR45   0x2D
#define AB8500_CODEC_CR46   0x2E
#define AB8500_CODEC_CR47   0x2F
#define AB8500_CODEC_CR48   0x30
#define AB8500_CODEC_CR49   0x31
#define AB8500_CODEC_CR50   0x32
#define AB8500_CODEC_CR51   0x33
#define AB8500_CODEC_CR52   0x34
#define AB8500_CODEC_CR53   0x35
#define AB8500_CODEC_CR54   0x36
#define AB8500_CODEC_CR55   0x37
#define AB8500_CODEC_CR56   0x38
#define AB8500_CODEC_CR57   0x39
#define AB8500_CODEC_CR58   0x3A
#define AB8500_CODEC_CR59   0x3B
#define AB8500_CODEC_CR60   0x3C
#define AB8500_CODEC_CR61   0x3D
#define AB8500_CODEC_CR62   0x3E
#define AB8500_CODEC_CR63   0x3F
#define AB8500_CODEC_CR64   0x40
#define AB8500_CODEC_CR65   0x41
#define AB8500_CODEC_CR66   0x42
#define AB8500_CODEC_CR67   0x43
#define AB8500_CODEC_CR68   0x44
#define AB8500_CODEC_CR69   0x45
#define AB8500_CODEC_CR70   0x46
#define AB8500_CODEC_CR71   0x47
#define AB8500_CODEC_CR72   0x48
#define AB8500_CODEC_CR73   0x49
#define AB8500_CODEC_CR74   0x4A
#define AB8500_CODEC_CR75   0x4B
#define AB8500_CODEC_CR76   0x4C
#define AB8500_CODEC_CR77   0x4D
#define AB8500_CODEC_CR78   0x4E
#define AB8500_CODEC_CR79   0x4F
#define AB8500_CODEC_CR80   0x50
#define AB8500_CODEC_CR81   0x51
#define AB8500_CODEC_CR82   0x52
#define AB8500_CODEC_CR83   0x53
#define AB8500_CODEC_CR84   0x54
#define AB8500_CODEC_CR85   0x55
#define AB8500_CODEC_CR86   0x56
#define AB8500_CODEC_CR87   0x57
#define AB8500_CODEC_CR88   0x58
#define AB8500_CODEC_CR89   0x59
#define AB8500_CODEC_CR90   0x5A
#define AB8500_CODEC_CR91   0x5B
#define AB8500_CODEC_CR92   0x5C
#define AB8500_CODEC_CR93   0x5D
#define AB8500_CODEC_CR94   0x5E
#define AB8500_CODEC_CR95   0x5F
#define AB8500_CODEC_CR96   0x60
#define AB8500_CODEC_CR97   0x61
#define AB8500_CODEC_CR98   0x62
#define AB8500_CODEC_CR99   0x63
#define AB8500_CODEC_CR100  0x64
#define AB8500_CODEC_CR101  0x65
#define AB8500_CODEC_CR102  0x66
#define AB8500_CODEC_CR103  0x67
#define AB8500_CODEC_CR104  0x68
#define AB8500_CODEC_CR105  0x69
#define AB8500_CODEC_CR106  0x6A
#define AB8500_CODEC_CR107  0x6B
#define AB8500_CODEC_CR108  0x6C
#define AB8500_CODEC_CR109  0x6D

/* CR0-CR0x0000 */
#define AB8500_CODEC_CR0_POWERUP   7
#define AB8500_CODEC_CR0_ENAANA    3

/* CR1-CR0x0001 */
#define AB8500_CODEC_CR1_SWRESET   7

/* CR2-CR0x0002 */
#define AB8500_CODEC_CR2_ENAD1   7
#define AB8500_CODEC_CR2_ENAD2   6
#define AB8500_CODEC_CR2_ENAD3   5
#define AB8500_CODEC_CR2_ENAD4   4
#define AB8500_CODEC_CR2_ENAD5   3
#define AB8500_CODEC_CR2_ENAD6   2

/* CR3-CR0x0003 */
#define AB8500_CODEC_CR3_ENDA1   7
#define AB8500_CODEC_CR3_ENDA2   6
#define AB8500_CODEC_CR3_ENDA3   5
#define AB8500_CODEC_CR3_ENDA4   4
#define AB8500_CODEC_CR3_ENDA5   3
#define AB8500_CODEC_CR3_ENDA6   2

/* CR4-CR0x0004 */
#define AB8500_CODEC_CR4_LOWPOWHS      7
#define AB8500_CODEC_CR4_LOWPOWDACHS   5
#define AB8500_CODEC_CR4_LOWPOWEAR     4
#define AB8500_CODEC_CR4_EAR_SEL_CM    2
#define AB8500_CODEC_CR4_HS_HP_DIS     1
#define AB8500_CODEC_CR4_EAR_HP_DIS    0

/* CR5-CR0x0005 */
#define AB8500_CODEC_CR5_ENMIC1     7
#define AB8500_CODEC_CR5_ENMIC2     6
#define AB8500_CODEC_CR5_ENLINL     5
#define AB8500_CODEC_CR5_ENLINR     4
#define AB8500_CODEC_CR5_MUTMIC1    3
#define AB8500_CODEC_CR5_MUTMIC2    2
#define AB8500_CODEC_CR5_MUTELINL   1
#define AB8500_CODEC_CR5_MUTELINR   0

/* CR6-CR0x0006 */
#define AB8500_CODEC_CR6_ENDMIC1      7
#define AB8500_CODEC_CR6_ENDMIC2      6
#define AB8500_CODEC_CR6_ENDMIC3      5
#define AB8500_CODEC_CR6_ENDMIC4      4
#define AB8500_CODEC_CR6_ENDMIC5      3
#define AB8500_CODEC_CR6_ENDMIC6      2

/* CR7-CR0x0007 */
#define AB8500_CODEC_CR7_MIC1SEL     7
#define AB8500_CODEC_CR7_LINRSEL     6
#define AB8500_CODEC_CR7_ENDRVHSL    5
#define AB8500_CODEC_CR7_ENDRVHSR    4
#define AB8500_CODEC_CR7_ENADCMIC    2
#define AB8500_CODEC_CR7_ENADCLINL   1
#define AB8500_CODEC_CR7_ENADCLINR   0

/* CR8-CR0x0008 */
#define AB8500_CODEC_CR8_CP_DIS_PLDWN   7
#define AB8500_CODEC_CR8_ENEAR          6
#define AB8500_CODEC_CR8_ENHSL          5
#define AB8500_CODEC_CR8_ENHSR          4
#define AB8500_CODEC_CR8_ENHFL          3
#define AB8500_CODEC_CR8_ENHFR          2
#define AB8500_CODEC_CR8_ENVIBL         1
#define AB8500_CODEC_CR8_ENVIBR         0

/* CR9-CR0x0009 */
#define AB8500_CODEC_CR9_ENADACEAR     6
#define AB8500_CODEC_CR9_ENADACHSL     5
#define AB8500_CODEC_CR9_ENADACHSR     4
#define AB8500_CODEC_CR9_ENADACHFL     3
#define AB8500_CODEC_CR9_ENADACHFR     2
#define AB8500_CODEC_CR9_ENADACVIBL    1
#define AB8500_CODEC_CR9_ENADACVIBR    0

/* CR10-CR0x000A */
#define AB8500_CODEC_CR10_MUTEEAR     6
#define AB8500_CODEC_CR10_MUTEHSL     5
#define AB8500_CODEC_CR10_MUTEHSR     4
#define AB8500_CODEC_CR10_MUTEHFL     3
#define AB8500_CODEC_CR10_MUTEHFR     2
#define AB8500_CODEC_CR10_MUTEVIBL    1
#define AB8500_CODEC_CR10_MUTEVIBR    0

/* CR11-CR0x000B */
#define AB8500_CODEC_CR11_ENSHORTPWD      7
#define AB8500_CODEC_CR11_EARSHORTDIS     6
#define AB8500_CODEC_CR11_HSLSHORTDIS     5
#define AB8500_CODEC_CR11_HSRSHORTDIS     4
#define AB8500_CODEC_CR11_HFLSHORTDIS     3
#define AB8500_CODEC_CR11_HFRSHORTDIS     2
#define AB8500_CODEC_CR11_VIBLSHORTDIS    1
#define AB8500_CODEC_CR11_VIBRSHORTDIS    0

/* CR12-CR0x000C */
#define AB8500_CODEC_CR12_ENCPHS        7
#define AB8500_CODEC_CR12_HSAUTOTIME    4
#define AB8500_CODEC_CR12_HSAUTOENSEL   1
#define AB8500_CODEC_CR12_HSAUTOEN      0

/* CR13-CR0x000D */
#define AB8500_CODEC_CR13_ENVDET_HTHRESH   4
#define AB8500_CODEC_CR13_ENVDET_LTHRESH   0

/* CR14-CR0x000E */
#define AB8500_CODEC_CR14_SMPSLVEN       7
#define AB8500_CODEC_CR14_ENVDETSMPSEN   6
#define AB8500_CODEC_CR14_CPLVEN         5
#define AB8500_CODEC_CR14_ENVDETCPEN     4
#define AB8500_CODEC_CR14_ENVDET_TIME    0

/* CR15-CR0x000F */
#define AB8500_CODEC_CR15_PWMTOVIBL   7
#define AB8500_CODEC_CR15_PWMTOVIBR   6
#define AB8500_CODEC_CR15_PWMLCTRL    5
#define AB8500_CODEC_CR15_PWMRCTRL    4
#define AB8500_CODEC_CR15_PWMNLCTRL   3
#define AB8500_CODEC_CR15_PWMPLCTRL   2
#define AB8500_CODEC_CR15_PWMNRCTRL   1
#define AB8500_CODEC_CR15_PWMPRCTRL   0

/* CR16-CR0x0010 */
#define AB8500_CODEC_CR16_PWMNLPOL         7
#define AB8500_CODEC_CR16_PWMNLDUTYCYCLE   0

/* CR17-CR0x0011 */
#define AB8500_CODEC_CR17_PWMPLPOL         7
#define AB8500_CODEC_CR17_PWMLPDUTYCYCLE   0

/* CR18-CR0x0012 */
#define AB8500_CODEC_CR18_PWMNRPOL         7
#define AB8500_CODEC_CR18_PWMNRDUTYCYCLE   0

/* CR19-CR0x0013 */
#define AB8500_CODEC_CR19_PWMPRPOL         7
#define AB8500_CODEC_CR19_PWMRPDUTYCYCLE   0

/* CR20-CR0x0014 */
#define AB8500_CODEC_CR20_EN_SE_MIC1   7
#define AB8500_CODEC_CR20_MIC1_GAIN    0

/* CR21-CR0x0015 */
#define AB8500_CODEC_CR21_EN_SE_MIC2   7
#define AB8500_CODEC_CR21_MIC2_GAIN    0

/* CR22-CR0x0016 */
#define AB8500_CODEC_CR22_HSL_GAIN    5
#define AB8500_CODEC_CR22_LINL_GAIN   0

/* CR23-CR0x0017 */
#define AB8500_CODEC_CR23_HSR_GAIN    5
#define AB8500_CODEC_CR23_LINR_GAIN   0

/* CR24-CR0x0018 */
#define AB8500_CODEC_CR24_LINTOHSL_GAIN   0

/* CR25-CR0x0019 */
#define AB8500_CODEC_CR25_LINTOHSR_GAIN   0

/* CR26-CR0x001A */
#define AB8500_CODEC_CR26_AD1NH       7
#define AB8500_CODEC_CR26_AD2NH       6
#define AB8500_CODEC_CR26_AD3NH       5
#define AB8500_CODEC_CR26_AD4NH       4
#define AB8500_CODEC_CR26_AD1_VOICE   3
#define AB8500_CODEC_CR26_AD2_VOICE   2
#define AB8500_CODEC_CR26_AD3_VOICE   1
#define AB8500_CODEC_CR26_AD4_VOICE   0

/* CR27-CR0x001B */
#define AB8500_CODEC_CR27_EN_MASTGEN       7
#define AB8500_CODEC_CR27_IF1_BITCLK_OSR   5
#define AB8500_CODEC_CR27_ENFS_BITCLK1     4
#define AB8500_CODEC_CR27_IF0_BITCLK_OSR   1
#define AB8500_CODEC_CR27_ENFS_BITCLK0     0

/* CR28-CR0x001C */
#define AB8500_CODEC_CR28_FSYNC0P     6
#define AB8500_CODEC_CR28_BITCLK0P    5
#define AB8500_CODEC_CR28_IF0DEL      4
#define AB8500_CODEC_CR28_IF0FORMAT   2
#define AB8500_CODEC_CR28_IF0WL       0

/* CR29-CR0x001D */
#define AB8500_CODEC_CR29_IF0DATOIF1AD   7
#define AB8500_CODEC_CR29_IF0CKTOIF1CK   6
#define AB8500_CODEC_CR29_IF1MASTER      5
#define AB8500_CODEC_CR29_IF1DATOIF0AD   3
#define AB8500_CODEC_CR29_IF1CKTOIF0CK   2
#define AB8500_CODEC_CR29_IF0MASTER      1
#define AB8500_CODEC_CR29_IF0BFIFOEN     0

/* CR30-CR0x001E */
#define AB8500_CODEC_CR30_FSYNC1P     6
#define AB8500_CODEC_CR30_BITCLK1P    5
#define AB8500_CODEC_CR30_IF1DEL      4
#define AB8500_CODEC_CR30_IF1FORMAT   2
#define AB8500_CODEC_CR30_IF1WL       0

/* CR31-CR0x001F */
#define AB8500_CODEC_CR31_ADOTOSLOT1   4
#define AB8500_CODEC_CR31_ADOTOSLOT0   0

/* CR32-CR0x0020 */
#define AB8500_CODEC_CR32_ADOTOSLOT3   4
#define AB8500_CODEC_CR32_ADOTOSLOT2   0

/* CR33-CR0x0021 */
#define AB8500_CODEC_CR33_ADOTOSLOT5   4
#define AB8500_CODEC_CR33_ADOTOSLOT4   0

/* CR34-CR0x0022 */
#define AB8500_CODEC_CR34_ADOTOSLOT7   4
#define AB8500_CODEC_CR34_ADOTOSLOT6   0

/* CR35-CR0x0023 */
#define AB8500_CODEC_CR35_ADOTOSLOT9   4
#define AB8500_CODEC_CR35_ADOTOSLOT8   0

/* CR36-CR0x0024 */
#define AB8500_CODEC_CR36_ADOTOSLOT11   4
#define AB8500_CODEC_CR36_ADOTOSLOT10   0

/* CR37-CR0x0025 */
#define AB8500_CODEC_CR37_ADOTOSLOT13   4
#define AB8500_CODEC_CR37_ADOTOSLOT12   0

/* CR38-CR0x0026 */
#define AB8500_CODEC_CR38_ADOTOSLOT15   4
#define AB8500_CODEC_CR38_ADOTOSLOT14   0

/* CR39-CR0x0027 */
#define AB8500_CODEC_CR39_ADOTOSLOT17   4
#define AB8500_CODEC_CR39_ADOTOSLOT16   0

/* CR40-CR0x0028 */
#define AB8500_CODEC_CR40_ADOTOSLOT19   4
#define AB8500_CODEC_CR40_ADOTOSLOT18   0

/* CR41-CR0x0029 */
#define AB8500_CODEC_CR41_ADOTOSLOT21   4
#define AB8500_CODEC_CR41_ADOTOSLOT20   0

/* CR42-CR0x002A */
#define AB8500_CODEC_CR42_ADOTOSLOT23   4
#define AB8500_CODEC_CR42_ADOTOSLOT22   0

/* CR43-CR0x002B */
#define AB8500_CODEC_CR43_ADOTOSLOT25   4
#define AB8500_CODEC_CR43_ADOTOSLOT24   0

/* CR44-CR0x002C */
#define AB8500_CODEC_CR44_ADOTOSLOT27   4
#define AB8500_CODEC_CR44_ADOTOSLOT26   0

/* CR45-CR0x002D */
#define AB8500_CODEC_CR45_ADOTOSLOT29   4
#define AB8500_CODEC_CR45_ADOTOSLOT28   0

/* CR46-CR0x002E */
#define AB8500_CODEC_CR46_ADOTOSLOT31   4
#define AB8500_CODEC_CR46_ADOTOSLOT30   0

/* CR47-CR0x002F */
#define AB8500_CODEC_CR47_HIZ_SL7   7
#define AB8500_CODEC_CR47_HIZ_SL6   6
#define AB8500_CODEC_CR47_HIZ_SL5   5
#define AB8500_CODEC_CR47_HIZ_SL4   4
#define AB8500_CODEC_CR47_HIZ_SL3   3
#define AB8500_CODEC_CR47_HIZ_SL2   2
#define AB8500_CODEC_CR47_HIZ_SL1   1
#define AB8500_CODEC_CR47_HIZ_SL0   0

/* CR48-CR0x0030 */
#define AB8500_CODEC_CR48_HIZ_SL15   7
#define AB8500_CODEC_CR48_HIZ_SL14   6
#define AB8500_CODEC_CR48_HIZ_SL13   5
#define AB8500_CODEC_CR48_HIZ_SL12   4
#define AB8500_CODEC_CR48_HIZ_SL11   3
#define AB8500_CODEC_CR48_HIZ_SL10   2
#define AB8500_CODEC_CR48_HIZ_SL9    1
#define AB8500_CODEC_CR48_HIZ_SL8    0

/* CR49-CR0x0031 */
#define AB8500_CODEC_CR49_HIZ_SL23   7
#define AB8500_CODEC_CR49_HIZ_SL22   6
#define AB8500_CODEC_CR49_HIZ_SL21   5
#define AB8500_CODEC_CR49_HIZ_SL20   4
#define AB8500_CODEC_CR49_HIZ_SL19   3
#define AB8500_CODEC_CR49_HIZ_SL18   2
#define AB8500_CODEC_CR49_HIZ_SL17   1
#define AB8500_CODEC_CR49_HIZ_SL16   0

/* CR50-CR0x0032 */
#define AB8500_CODEC_CR50_HIZ_SL31   7
#define AB8500_CODEC_CR50_HIZ_SL30   6
#define AB8500_CODEC_CR50_HIZ_SL29   5
#define AB8500_CODEC_CR50_HIZ_SL28   4
#define AB8500_CODEC_CR50_HIZ_SL27   3
#define AB8500_CODEC_CR50_HIZ_SL26   2
#define AB8500_CODEC_CR50_HIZ_SL25   1
#define AB8500_CODEC_CR50_HIZ_SL24   0

/* CR51-CR0x0033 */
#define AB8500_CODEC_CR51_DA12_VOICE       7
#define AB8500_CODEC_CR51_SLDAI1TOSLADO1   5
#define AB8500_CODEC_CR51_SLTODA1          0

/* CR52-CR0x0034 */
#define AB8500_CODEC_CR52_SLDAI1TOSLADO2   5
#define AB8500_CODEC_CR52_SLTODA2          0

/* CR53-CR0x0035 */
#define AB8500_CODEC_CR53_DA34_VOICE       7
#define AB8500_CODEC_CR53_SLDAI1TOSLADO3   5
#define AB8500_CODEC_CR53_SLTODA3          0

/* CR54-CR0x0036 */
#define AB8500_CODEC_CR54_SLDAI1TOSLADO4   5
#define AB8500_CODEC_CR54_SLTODA4          0

/* CR55-CR0x0037 */
#define AB8500_CODEC_CR55_DA56_VOICE       7
#define AB8500_CODEC_CR55_SLDAI1TOSLADO5   5
#define AB8500_CODEC_CR55_SLTODA5          0

/* CR56-CR0x0038 */
#define AB8500_CODEC_CR56_SLDAI1TOSLADO6   5
#define AB8500_CODEC_CR56_SLTODA6          0

/* CR57-CR0x0039 */
#define AB8500_CODEC_CR57_BFIFULL_MSK   6
#define AB8500_CODEC_CR57_BFIEMPT_MSK   5
#define AB8500_CODEC_CR57_DACHAN_MSK    4
#define AB8500_CODEC_CR57_GAIN_MSK      3
#define AB8500_CODEC_CR57_DSPAD_MSK     2
#define AB8500_CODEC_CR57_DSPDA_MSK     1
#define AB8500_CODEC_CR57_STFIR_MSK     0

/* CR58-CR0x003A */
#define AB8500_CODEC_CR58_BFIFULL_EV   6
#define AB8500_CODEC_CR58_BFIEMPT_EV   5
#define AB8500_CODEC_CR58_DACHAN_EV    4
#define AB8500_CODEC_CR58_GAIN_EV      3
#define AB8500_CODEC_CR58_DSPAD_EV     2
#define AB8500_CODEC_CR58_DSPDA_EV     1
#define AB8500_CODEC_CR58_STFIR_EV     0

/* CR59-CR0x003B */
#define AB8500_CODEC_CR59_VSSREADY_MSK   7
#define AB8500_CODEC_CR59_SHRTVIBL_MSK   6
#define AB8500_CODEC_CR59_SHRTVIBR_MSK   5
#define AB8500_CODEC_CR59_SHRTHFL_MSK    4
#define AB8500_CODEC_CR59_SHRTHFR_MSK    3
#define AB8500_CODEC_CR59_SHRTHSL_MSK    2
#define AB8500_CODEC_CR59_SHRTHSR_MSK    1
#define AB8500_CODEC_CR59_SHRTEAR_MSK    0

/* CR60-CR0x003C */
#define AB8500_CODEC_CR60_VSSREADY_EV   7
#define AB8500_CODEC_CR60_SHRTVIBL_EV   6
#define AB8500_CODEC_CR60_SHRTVIBR_EV   5
#define AB8500_CODEC_CR60_SHRTHFL_EV    4
#define AB8500_CODEC_CR60_SHRTHFR_EV    3
#define AB8500_CODEC_CR60_SHRTHSL_EV    2
#define AB8500_CODEC_CR60_SHRTHSR_EV    1
#define AB8500_CODEC_CR60_SHRTEAR_EV    0

/* CR61-CR0x003D */
#define AB8500_CODEC_CR61_REVISION     2
#define AB8500_CODEC_CR61_FADE_SPEED   0

/* CR62-CR0x003E */
#define AB8500_CODEC_CR62_DMIC1SINC3   5
#define AB8500_CODEC_CR62_DMIC2SINC3   4
#define AB8500_CODEC_CR62_DMIC3SINC3   3
#define AB8500_CODEC_CR62_DMIC4SINC3   2
#define AB8500_CODEC_CR62_DMIC5SINC3   1
#define AB8500_CODEC_CR62_DMIC6SINC3   0

/* CR63-CR0x003F */
#define AB8500_CODEC_CR63_DATOHSLEN   7
#define AB8500_CODEC_CR63_DATOHSREN   6
#define AB8500_CODEC_CR63_AD1SEL      5
#define AB8500_CODEC_CR63_AD2SEL      4
#define AB8500_CODEC_CR63_AD3SEL      3
#define AB8500_CODEC_CR63_AD5SEL      2
#define AB8500_CODEC_CR63_AD6SEL      1
#define AB8500_CODEC_CR63_ANCSEL      0

/* CR64-CR0x0040 */
#define AB8500_CODEC_CR64_DATOHFREN   7
#define AB8500_CODEC_CR64_DATOHFLEN   6
#define AB8500_CODEC_CR64_HFRSEL      5
#define AB8500_CODEC_CR64_HFLSEL      4
#define AB8500_CODEC_CR64_STFIR1SEL   2
#define AB8500_CODEC_CR64_STFIR2SEL   0

/* CR65-CR0x0041 */
#define AB8500_CODEC_CR65_FADEDIS_AD1   6
#define AB8500_CODEC_CR65_AD1GAIN       0

/* CR66-CR0x0042 */
#define AB8500_CODEC_CR66_FADEDIS_AD2   6
#define AB8500_CODEC_CR66_AD2GAIN       0

/* CR67-CR0x0043 */
#define AB8500_CODEC_CR67_FADEDIS_AD3   6
#define AB8500_CODEC_CR67_AD3GAIN       0

/* CR68-CR0x0044 */
#define AB8500_CODEC_CR68_FADEDIS_AD4   6
#define AB8500_CODEC_CR68_AD4GAIN       0

/* CR69-CR0x0045 */
#define AB8500_CODEC_CR69_FADEDIS_AD5   6
#define AB8500_CODEC_CR69_AD5GAIN       0

/* CR70-CR0x0046 */
#define AB8500_CODEC_CR70_FADEDIS_AD6   6
#define AB8500_CODEC_CR70_AD6GAIN       0

/* CR71-CR0x0047 */
#define AB8500_CODEC_CR71_FADEDIS_DA1   6
#define AB8500_CODEC_CR71_DA1GAIN       0

/* CR72-CR0x0048 */
#define AB8500_CODEC_CR72_FADEDIS_DA2   6
#define AB8500_CODEC_CR72_DA2GAIN       0

/* CR73-CR0x0049 */
#define AB8500_CODEC_CR73_FADEDIS_DA3   6
#define AB8500_CODEC_CR73_DA3GAIN       0

/* CR74-CR0x004A */
#define AB8500_CODEC_CR74_FADEDIS_DA4   6
#define AB8500_CODEC_CR74_DA4GAIN       0

/* CR75-CR0x004B */
#define AB8500_CODEC_CR75_FADEDIS_DA5   6
#define AB8500_CODEC_CR75_DA5GAIN       0

/* CR76-CR0x004C */
#define AB8500_CODEC_CR76_FADEDIS_DA6   6
#define AB8500_CODEC_CR76_DA6GAIN       0

/* CR77-CR0x004D */
#define AB8500_CODEC_CR77_FADEDIS_AD1L   6
#define AB8500_CODEC_CR77_AD1LBGAIN      0

/* CR78-CR0x004E */
#define AB8500_CODEC_CR78_FADEDIS_AD2L   6
#define AB8500_CODEC_CR78_AD2LBGAIN      0

/* CR79-CR0x004F */
#define AB8500_CODEC_CR79_HSSINC1       7
#define AB8500_CODEC_CR79_FADEDIS_HSL   4
#define AB8500_CODEC_CR79_HSLDGAIN      0

/* CR80-CR0x0050 */
#define AB8500_CODEC_CR80_FADEDIS_HSR   4
#define AB8500_CODEC_CR80_HSRDGAIN      0

/* CR81-CR0x0051 */
#define AB8500_CODEC_CR81_STFIR1GAIN   0

/* CR82-CR0x0052 */
#define AB8500_CODEC_CR82_STFIR2GAIN   0

/* CR83-CR0x0053 */
#define AB8500_CODEC_CR83_ENANC          2
#define AB8500_CODEC_CR83_ANCIIRINIT     1
#define AB8500_CODEC_CR83_ANCFIRUPDATE   0

/* CR84-CR0x0054 */
#define AB8500_CODEC_CR84_ANCINSHIFT   0

/* CR85-CR0x0055 */
#define AB8500_CODEC_CR85_ANCFIROUTSHIFT   0

/* CR86-CR0x0056 */
#define AB8500_CODEC_CR86_ANCSHIFTOUT   0

/* CR87-CR0x0057 */
#define AB8500_CODEC_CR87_ANCFIRCOEFF_MSB   0

/* CR88-CR0x0058 */
#define AB8500_CODEC_CR88_ANCFIRCOEFF_LSB   0

/* CR89-CR0x0059 */
#define AB8500_CODEC_CR89_ANCIIRCOEFF_MSB   0

/* CR90-CR0x005A */
#define AB8500_CODEC_CR90_ANCIIRCOEFF_LSB   0

/* CR91-CR0x005B */
#define AB8500_CODEC_CR91_ANCWARPDEL_MSB   0

/* CR92-CR0x005C */
#define AB8500_CODEC_CR92_ANCWARPDEL_LSB   0

/* CR93-CR0x005D */
#define AB8500_CODEC_CR93_ANCFIRPEAK_MSB   0

/* CR94-CR0x005E */
#define AB8500_CODEC_CR94_ANCFIRPEAK_LSB   0

/* CR95-CR0x005F */
#define AB8500_CODEC_CR95_ANCIIRPEAK_MSB   0

/* CR96-CR0x0060 */
#define AB8500_CODEC_CR96_ANCIIRPEAK_LSB   0

/* CR97-CR0x0061 */
#define AB8500_CODEC_CR97_STFIR_SET    7
#define AB8500_CODEC_CR97_STFIR_ADDR   0

/* CR98-CR0x0062 */
#define AB8500_CODEC_CR98_STFIR_COEFF_MSB   0

/* CR99-CR0x0063 */
#define AB8500_CODEC_CR99_STFIR_COEFF_LSB   0

/* CR100-CR0x0064 */
#define AB8500_CODEC_CR100_ENSTFIRS      2
#define AB8500_CODEC_CR100_STFIRSTOIF1   1
#define AB8500_CODEC_CR100_STFIR_BUSY    0

/* CR101-CR0x0065 */
#define AB8500_CODEC_CR101_PARLHF             7
#define AB8500_CODEC_CR101_PARLVIB            6
#define AB8500_CODEC_CR101_CLASSDVIBLSWAPEN   3
#define AB8500_CODEC_CR101_CLASSDVIBRSWAPEN   2
#define AB8500_CODEC_CR101_CLASSDHFLSWAPEN    1
#define AB8500_CODEC_CR101_CLASSDHFRSWAPEN    0

/* CR102-CR0x0066 */
#define AB8500_CODEC_CR102_CLASSD_FIRBYP      4
#define AB8500_CODEC_CR102_CLASSD_HIGHVOLEN   0

/* CR103-CR0x0067 */
#define AB8500_CODEC_CR103_CLASSD_DITHERHPGAIN   4
#define AB8500_CODEC_CR103_CLASSD_DITHERWGAIN    0

/* CR104-CR0x0068 */
#define AB8500_CODEC_CR104_BFIFOINT   0

/* CR105-CR0x0069 */
#define AB8500_CODEC_CR105_BFIFOTX   0

/* CR106-CR0x006A */
#define AB8500_CODEC_CR106_BFIFOFSEXT   4
#define AB8500_CODEC_CR106_BFIFOMSK     2
#define AB8500_CODEC_CR106_BFIFOMSTR    1
#define AB8500_CODEC_CR106_BFIFOSTRT    0

/* CR107-CR0x006B */
#define AB8500_CODEC_CR107_BFIFOSAMPNR   0

/* CR108-CR0x006C */
#define AB8500_CODEC_CR108_BFIFOWAKEUP   0

/* CR109-CR0x006D */
#define AB8500_CODEC_CR109_BFIFOSAMPLES   0

/* For SetVolume API*/
#define AB8500_CODEC_MAX_VOLUME      100

/* Analog MIC1 & MIC2 */
#define AB8500_CODEC_MIC_VOLUME_MAX      31
#define AB8500_CODEC_MIC_VOLUME_MEDIUM   15
#define AB8500_CODEC_MIC_VOLUME_MIN      0

/* Line-in */
#define AB8500_CODEC_LINEIN_VOLUME_MAX     31
#define AB8500_CODEC_LINEIN_VOLUME_MEDIUM  15
#define AB8500_CODEC_LINEIN_VOLUME_MIN     0

/* HeadSet */
#define AB8500_CODEC_HEADSET_VOLUME_MAX     0
#define AB8500_CODEC_HEADSET_VOLUME_MEDIUM  3
#define AB8500_CODEC_HEADSET_VOLUME_MIN     7

/* HeadSet Digital */
#define AB8500_CODEC_HEADSET_D_VOLUME_MAX     0
#define AB8500_CODEC_HEADSET_D_VOLUME_MEDIUM  7
#define AB8500_CODEC_HEADSET_D_VOLUME_MIN     15
#define AB8500_CODEC_HEADSET_D_VOLUME_0DB     8

/* Digital AD Path */
#define AB8500_CODEC_AD_D_VOLUME_MAX     0
#define AB8500_CODEC_AD_D_VOLUME_MEDIUM  31
#define AB8500_CODEC_AD_D_VOLUME_MIN     63

/* Digital DA Path */
#define AB8500_CODEC_DA_D_VOLUME_MAX     0
#define AB8500_CODEC_DA_D_VOLUME_MEDIUM  31
#define AB8500_CODEC_DA_D_VOLUME_MIN     63

/* EarPiece Digital */
#define AB8500_CODEC_EARPIECE_D_VOLUME_MAX     0
#define AB8500_CODEC_EARPIECE_D_VOLUME_MEDIUM  7
#define AB8500_CODEC_EARPIECE_D_VOLUME_MIN     15

/* AD1 loopback to HFL & HFR Digital */
#define AB8500_CODEC_AD_LB_TO_HF_L_R_VOLUME_MAX     0
#define AB8500_CODEC_AD_LB_TO_HF_L_R_VOLUME_MEDIUM  31
#define AB8500_CODEC_AD_LB_TO_HF_L_R_VOLUME_MIN     63

/* Line-in to HSL & HSR */
#define AB8500_CODEC_LINEIN_TO_HS_L_R_VOLUME_MAX     0
#define AB8500_CODEC_LINEIN_TO_HS_L_R_VOLUME_MEDIUM  9
#define AB8500_CODEC_LINEIN_TO_HS_L_R_VOLUME_MIN     18
#define AB8500_CODEC_LINEIN_TO_HS_L_R_LOOP_OPEN      19

/* Vibrator */
#define AB8500_CODEC_VIBRATOR_VOLUME_MAX     100
#define AB8500_CODEC_VIBRATOR_VOLUME_MEDIUM  50
#define AB8500_CODEC_VIBRATOR_VOLUME_MIN     0

/* CR0 - 7 */
typedef enum {
	AB8500_CODEC_CR0_POWERUP_OFF,
	AB8500_CODEC_CR0_POWERUP_ON
} t_ab8500_codec_cr0_powerup;

/* CR0 - 3 */
typedef enum {
	AB8500_CODEC_CR0_ENAANA_OFF,
	AB8500_CODEC_CR0_ENAANA_ON
} t_ab8500_codec_cr0_enaana;

/* CR1 - 7 */
typedef enum {
	AB8500_CODEC_CR1_SWRESET_DISABLED,
	AB8500_CODEC_CR1_SWRESET_ENABLED
} t_ab8500_codec_cr1_swreset;

/* CR2 - 7 */
typedef enum {
	AB8500_CODEC_CR2_ENAD1_DISABLED,
	AB8500_CODEC_CR2_ENAD1_ENABLED
} t_ab8500_codec_cr2_enad1;

/* CR2 - 6 */
typedef enum {
	AB8500_CODEC_CR2_ENAD2_DISABLED,
	AB8500_CODEC_CR2_ENAD2_ENABLED
} t_ab8500_codec_cr2_enad2;

/* CR2 - 5 */
typedef enum {
	AB8500_CODEC_CR2_ENAD3_DISABLED,
	AB8500_CODEC_CR2_ENAD3_ENABLED
} t_ab8500_codec_cr2_enad3;

/* CR2 - 4 */
typedef enum {
	AB8500_CODEC_CR2_ENAD4_DISABLED,
	AB8500_CODEC_CR2_ENAD4_ENABLED
} t_ab8500_codec_cr2_enad4;

/* CR2 - 3 */
typedef enum {
	AB8500_CODEC_CR2_ENAD5_DISABLED,
	AB8500_CODEC_CR2_ENAD5_ENABLED
} t_ab8500_codec_cr2_enad5;

/* CR2 - 2 */
typedef enum {
	AB8500_CODEC_CR2_ENAD6_DISABLED,
	AB8500_CODEC_CR2_ENAD6_ENABLED
} t_ab8500_codec_cr2_enad6;

/* CR3 - 7 */
typedef enum {
	AB8500_CODEC_CR3_ENDA1_DISABLED,
	AB8500_CODEC_CR3_ENDA1_ENABLED
} t_ab8500_codec_cr3_enda1;

/* CR3 - 6 */
typedef enum {
	AB8500_CODEC_CR3_ENDA2_DISABLED,
	AB8500_CODEC_CR3_ENDA2_ENABLED
} t_ab8500_codec_cr3_enda2;

/* CR3 - 5 */
typedef enum {
	AB8500_CODEC_CR3_ENDA3_DISABLED,
	AB8500_CODEC_CR3_ENDA3_ENABLED
} t_ab8500_codec_cr3_enda3;

/* CR3 - 4 */
typedef enum {
	AB8500_CODEC_CR3_ENDA4_DISABLED,
	AB8500_CODEC_CR3_ENDA4_ENABLED
} t_ab8500_codec_cr3_enda4;

/* CR3 - 3 */
typedef enum {
	AB8500_CODEC_CR3_ENDA5_DISABLED,
	AB8500_CODEC_CR3_ENDA5_ENABLED
} t_ab8500_codec_cr3_enda5;

/* CR3 - 2 */
typedef enum {
	AB8500_CODEC_CR3_ENDA6_DISABLED,
	AB8500_CODEC_CR3_ENDA6_ENABLED
} t_ab8500_codec_cr3_enda6;

/* CR4 - 7 */
typedef enum {
	AB8500_CODEC_CR4_LOWPOWHS_NORMAL,
	AB8500_CODEC_CR4_LOWPOWHS_LP
} t_ab8500_codec_cr4_lowpowhs;

/* CR4 - 6:5 */
typedef enum {
	AB8500_CODEC_CR4_LOWPOWDACHS_NORMAL,
	AB8500_CODEC_CR4_LOWPOWDACHS_DRIVERS_LP,
	AB8500_CODEC_CR4_LOWPOWDACHS_LP,
	AB8500_CODEC_CR4_LOWPOWDACHS_BOTH_LP
} t_ab8500_codec_cr4_lowpowdachs;

/* CR4 - 4 */
typedef enum {
	AB8500_CODEC_CR4_LOWPOWEAR_NORMAL,
	AB8500_CODEC_CR4_LOWPOWEAR_LP
} t_ab8500_codec_cr4_lowpowear;

/* CR4 - 3:2 */
typedef enum {
	AB8500_CODEC_CR4_EAR_SEL_CM_0_95V,
	AB8500_CODEC_CR4_EAR_SEL_CM_1_1V,
	AB8500_CODEC_CR4_EAR_SEL_CM_1_27V,
	AB8500_CODEC_CR4_EAR_SEL_CM_1_58V
} t_ab8500_codec_cr4_ear_sel_cm;

/* CR4 - 1 */
typedef enum {
	AB8500_CODEC_CR4_HS_HP_DIS_FILTER_ENABLED,
	AB8500_CODEC_CR4_HS_HP_DIS_FILTER_DISABLED
} t_ab8500_codec_cr4_hs_hp_dis;

/* CR4 - 0 */
typedef enum {
	AB8500_CODEC_CR4_EAR_HP_DIS_FILTER_ENABLED,
	AB8500_CODEC_CR4_EAR_HP_DIS_FILTER_DISABLED
} t_ab8500_codec_cr4_ear_hp_dis;

/* CR5 - 7 */
typedef enum {
	AB8500_CODEC_CR5_ENMIC1_DISABLED,
	AB8500_CODEC_CR5_ENMIC1_ENABLED
} t_ab8500_codec_cr5_enmic1;

/* CR5 - 6 */
typedef enum {
	AB8500_CODEC_CR5_ENMIC2_DISABLED,
	AB8500_CODEC_CR5_ENMIC2_ENABLED
} t_ab8500_codec_cr5_enmic2;

/* CR5 - 5 */
typedef enum {
	AB8500_CODEC_CR5_ENLINL_DISABLED,
	AB8500_CODEC_CR5_ENLINL_ENABLED
} t_ab8500_codec_cr5_enlinl;

/* CR5 - 4 */
typedef enum {
	AB8500_CODEC_CR5_ENLINR_DISABLED,
	AB8500_CODEC_CR5_ENLINR_ENABLED
} t_ab8500_codec_cr5_enlinr;

/* CR5 - 3 */
typedef enum {
	AB8500_CODEC_CR5_MUTMIC1_DISABLED,
	AB8500_CODEC_CR5_MUTMIC1_ENABLED
} t_ab8500_codec_cr5_mutmic1;

/* CR5 - 2 */
typedef enum {
	AB8500_CODEC_CR5_MUTMIC2_DISABLED,
	AB8500_CODEC_CR5_MUTMIC2_ENABLED
} t_ab8500_codec_cr5_mutmic2;

/* CR5 - 1 */
typedef enum {
	AB8500_CODEC_CR5_MUTLINL_DISABLED,
	AB8500_CODEC_CR5_MUTLINL_ENABLED
} t_ab8500_codec_cr5_mutlinl;

/* CR5 - 0 */
typedef enum {
	AB8500_CODEC_CR5_MUTLINR_DISABLED,
	AB8500_CODEC_CR5_MUTLINR_ENABLED
} t_ab8500_codec_cr5_mutlinr;

/* CR6 - 7 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC1_DISABLED,
	AB8500_CODEC_CR6_ENDMIC1_ENABLED
} t_ab8500_codec_cr6_endmic1;

/* CR6 - 6 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC2_DISABLED,
	AB8500_CODEC_CR6_ENDMIC2_ENABLED
} t_ab8500_codec_cr6_endmic2;

/* CR6 - 5 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC3_DISABLED,
	AB8500_CODEC_CR6_ENDMIC3_ENABLED
} t_ab8500_codec_cr6_endmic3;

/* CR6 - 4 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC4_DISABLED,
	AB8500_CODEC_CR6_ENDMIC4_ENABLED
} t_ab8500_codec_cr6_endmic4;

/* CR6 - 3 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC5_DISABLED,
	AB8500_CODEC_CR6_ENDMIC5_ENABLED
} t_ab8500_codec_cr6_endmic5;

/* CR6 - 2 */
typedef enum {
	AB8500_CODEC_CR6_ENDMIC6_DISABLED,
	AB8500_CODEC_CR6_ENDMIC6_ENABLED
} t_ab8500_codec_cr6_endmic6;

/* CR7 - 7 */
typedef enum {
	AB8500_CODEC_CR7_MIC1SEL_MIC1A,
	AB8500_CODEC_CR7_MIC1SEL_MIC1B
} t_ab8500_codec_cr7_mic1sel;

/* CR7 - 6 */
typedef enum {
	AB8500_CODEC_CR7_LINRSEL_MIC2,
	AB8500_CODEC_CR7_LINRSEL_LINR
} t_ab8500_codec_cr7_linrsel;

/* CR7 - 5 */
typedef enum {
	AB8500_CODEC_CR7_ENDRVHSL_DISABLED,
	AB8500_CODEC_CR7_ENDRVHSL_ENABLED
} t_ab8500_codec_cr7_endrvhsl;

/* CR7 - 4 */
typedef enum {
	AB8500_CODEC_CR7_ENDRVHSR_DISABLED,
	AB8500_CODEC_CR7_ENDRVHSR_ENABLED
} t_ab8500_codec_cr7_endrvhsr;

/* CR7 - 2 */
typedef enum {
	AB8500_CODEC_CR7_ENADCMIC_DISABLED,
	AB8500_CODEC_CR7_ENADCMIC_ENABLED
} t_ab8500_codec_cr7_enadcmic;

/* CR7 - 1 */
typedef enum {
	AB8500_CODEC_CR7_ENADCLINL_DISABLED,
	AB8500_CODEC_CR7_ENADCLINL_ENABLED
} t_ab8500_codec_cr7_enadclinl;

/* CR7 - 0 */
typedef enum {
	AB8500_CODEC_CR7_ENADCLINR_DISABLED,
	AB8500_CODEC_CR7_ENADCLINR_ENABLED
} t_ab8500_codec_cr7_enadclinr;

/* CR8 - 7 */
typedef enum {
	AB8500_CODEC_CR8_CP_DIS_PLDWN_ENABLED,
	AB8500_CODEC_CR8_CP_DIS_PLDWN_DISABLED
} t_ab8500_codec_cr8_cp_dis_pldwn;

/* CR8 - 6 */
typedef enum {
	AB8500_CODEC_CR8_ENEAR_DISABLED,
	AB8500_CODEC_CR8_ENEAR_ENABLED
} t_ab8500_codec_cr8_enear;

/* CR8 - 5 */
typedef enum {
	AB8500_CODEC_CR8_ENHSL_DISABLED,
	AB8500_CODEC_CR8_ENHSL_ENABLED
} t_ab8500_codec_cr8_enhsl;

/* CR8 - 4 */
typedef enum {
	AB8500_CODEC_CR8_ENHSR_DISABLED,
	AB8500_CODEC_CR8_ENHSR_ENABLED
} t_ab8500_codec_cr8_enhsr;

/* CR8 - 3 */
typedef enum {
	AB8500_CODEC_CR8_ENHFL_DISABLED,
	AB8500_CODEC_CR8_ENHFL_ENABLED
} t_ab8500_codec_cr8_enhfl;

/* CR8 - 2 */
typedef enum {
	AB8500_CODEC_CR8_ENHFR_DISABLED,
	AB8500_CODEC_CR8_ENHFR_ENABLED
} t_ab8500_codec_cr8_enhfr;

/* CR8 - 1 */
typedef enum {
	AB8500_CODEC_CR8_ENVIBL_DISABLED,
	AB8500_CODEC_CR8_ENVIBL_ENABLED
} t_ab8500_codec_cr8_envibl;

/* CR8 - 0 */
typedef enum {
	AB8500_CODEC_CR8_ENVIBR_DISABLED,
	AB8500_CODEC_CR8_ENVIBR_ENABLED
} t_ab8500_codec_cr8_envibr;

/* CR9 - 6 */
typedef enum {
	AB8500_CODEC_CR9_ENDACEAR_DISABLED,
	AB8500_CODEC_CR9_ENDACEAR_ENABLED
} t_ab8500_codec_cr9_endacear;

/* CR9 - 5 */
typedef enum {
	AB8500_CODEC_CR9_ENDACHSL_DISABLED,
	AB8500_CODEC_CR9_ENDACHSL_ENABLED
} t_ab8500_codec_cr9_endachsl;

/* CR9 - 4 */
typedef enum {
	AB8500_CODEC_CR9_ENDACHSR_DISABLED,
	AB8500_CODEC_CR9_ENDACHSR_ENABLED
} t_ab8500_codec_cr9_endachsr;

/* CR9 - 3 */
typedef enum {
	AB8500_CODEC_CR9_ENDACHFL_DISABLED,
	AB8500_CODEC_CR9_ENDACHFL_ENABLED
} t_ab8500_codec_cr9_endachfl;

/* CR9 - 2 */
typedef enum {
	AB8500_CODEC_CR9_ENDACHFR_DISABLED,
	AB8500_CODEC_CR9_ENDACHFR_ENABLED
} t_ab8500_codec_cr9_endachfr;

/* CR9 - 1 */
typedef enum {
	AB8500_CODEC_CR9_ENDACVIBL_DISABLED,
	AB8500_CODEC_CR9_ENDACVIBL_ENABLED
} t_ab8500_codec_cr9_endacvibl;

/* CR9 - 0 */
typedef enum {
	AB8500_CODEC_CR9_ENDACVIBR_DISABLED,
	AB8500_CODEC_CR9_ENDACVIBR_ENABLED
} t_ab8500_codec_cr9_endacvibr;

/* CR10 - 6 */
typedef enum {
	AB8500_CODEC_CR10_MUTEEAR_DISABLED,
	AB8500_CODEC_CR10_MUTEEAR_ENABLED
} t_ab8500_codec_cr10_muteear;

/* CR10 - 5 */
typedef enum {
	AB8500_CODEC_CR10_MUTEHSL_DISABLED,
	AB8500_CODEC_CR10_MUTEHSL_ENABLED
} t_ab8500_codec_cr10_mutehsl;

/* CR10 - 4 */
typedef enum {
	AB8500_CODEC_CR10_MUTEHSR_DISABLED,
	AB8500_CODEC_CR10_MUTEHSR_ENABLED
} t_ab8500_codec_cr10_mutehsr;

/* CR10 - 3 */
typedef enum {
	AB8500_CODEC_CR10_MUTEHFL_DISABLED,
	AB8500_CODEC_CR10_MUTEHFL_ENABLED
} t_ab8500_codec_cr10_mutehfl;

/* CR10 - 2 */
typedef enum {
	AB8500_CODEC_CR10_MUTEHFR_DISABLED,
	AB8500_CODEC_CR10_MUTEHFR_ENABLED
} t_ab8500_codec_cr10_mutehfr;

/* CR10 - 1 */
typedef enum {
	AB8500_CODEC_CR10_MUTEVIBL_DISABLED,
	AB8500_CODEC_CR10_MUTEVIBL_ENABLED
} t_ab8500_codec_cr10_mutevibl;

/* CR10 - 0 */
typedef enum {
	AB8500_CODEC_CR10_MUTEVIBR_DISABLED,
	AB8500_CODEC_CR10_MUTEVIBR_ENABLED
} t_ab8500_codec_cr10_mutevibr;

/* CR11 - 7 */
typedef enum {
	AB8500_CODEC_CR11_EARSHORTPWD_DISABLED,
	AB8500_CODEC_CR11_EARSHORTPWD_ENABLED
} t_ab8500_codec_cr11_earshortpwd;

/* CR11 - 6 */
typedef enum {
	AB8500_CODEC_CR11_EARSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_EARSHORTDIS_DISABLED
} t_ab8500_codec_cr11_earshortdis;

/* CR11 - 5 */
typedef enum {
	AB8500_CODEC_CR11_HSLSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_HSLSHORTDIS_DISABLED
} t_ab8500_codec_cr11_hslshortdis;

/* CR11 - 4 */
typedef enum {
	AB8500_CODEC_CR11_HSRSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_HSRSHORTDIS_DISABLED
} t_ab8500_codec_cr11_hsrshortdis;

/* CR11 - 3 */
typedef enum {
	AB8500_CODEC_CR11_HFLSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_HFLSHORTDIS_DISABLED
} t_ab8500_codec_cr11_hflshortdis;

/* CR11 - 2 */
typedef enum {
	AB8500_CODEC_CR11_HFRSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_HFRSHORTDIS_DISABLED
} t_ab8500_codec_cr11_hfrshortdis;

/* CR11 - 1 */
typedef enum {
	AB8500_CODEC_CR11_VIBLSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_VIBLSHORTDIS_DISABLED
} t_ab8500_codec_cr11_viblshortdis;

/* CR11 - 0 */
typedef enum {
	AB8500_CODEC_CR11_VIBRSHORTDIS_ENABLED,
	AB8500_CODEC_CR11_VIBRSHORTDIS_DISABLED
} t_ab8500_codec_cr11_vibrshortdis;

/* CR12 - 7 */
typedef enum {
	AB8500_CODEC_CR12_ENCPHS_DISABLED,
	AB8500_CODEC_CR12_ENCPHS_ENABLED
} t_ab8500_codec_cr12_encphs;

/* CR12 - 6:4 */
typedef enum {
	AB8500_CODEC_CR12_HSAUTOTIME_6_6USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_13_3USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_26_6USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_53_2USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_106_4USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_212_8USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_425_6USEC,
	AB8500_CODEC_CR12_HSAUTOTIME_851_2USEC,
} t_ab8500_codec_cr12_hsautotime;

/* CR12 - 1 */
typedef enum {
	AB8500_CODEC_CR12_HSAUTOENSEL_DISABLED,
	AB8500_CODEC_CR12_HSAUTOENSEL_ENABLED
} t_ab8500_codec_cr12_hsautoensel;

/* CR12 - 0 */
typedef enum {
	AB8500_CODEC_CR12_HSAUTOEN_DISABLED,
	AB8500_CODEC_CR12_HSAUTOEN_ENABLED
} t_ab8500_codec_cr12_hsautoen;

/* CR13 - 7:4 */
typedef enum {
	AB8500_CODEC_CR13_ENVDET_HTHRESH_25,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_50,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_100,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_150,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_200,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_250,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_300,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_350,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_400,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_450,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_500,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_550,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_600,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_650,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_700,
	AB8500_CODEC_CR13_ENVDET_HTHRESH_750
} t_ab8500_codec_cr13_envdet_hthresh;

/* CR13 - 3:0 */
typedef enum {
	AB8500_CODEC_CR13_ENVDET_LTHRESH_25,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_50,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_100,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_150,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_200,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_250,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_300,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_350,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_400,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_450,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_500,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_550,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_600,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_650,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_700,
	AB8500_CODEC_CR13_ENVDET_LTHRESH_750
} t_ab8500_codec_cr13_envdet_lthresh;

/* CR14 - 7 */
typedef enum {
	AB8500_CODEC_CR14_SMPSLVEN_HIGHVOLTAGE,
	AB8500_CODEC_CR14_SMPSLVEN_LOWVOLTAGE
} t_ab8500_codec_cr14_smpslven;

/* CR14 - 6 */
typedef enum {
	AB8500_CODEC_CR14_ENVDETSMPSEN_DISABLED,
	AB8500_CODEC_CR14_ENVDETSMPSEN_ENABLED
} t_ab8500_codec_cr14_envdetsmpsen;

/* CR14 - 5 */
typedef enum {
	AB8500_CODEC_CR14_CPLVEN_HIGHVOLTAGE,
	AB8500_CODEC_CR14_CPLVEN_LOWVOLTAGE
} t_ab8500_codec_cr14_cplven;

/* CR14 - 4 */
typedef enum {
	AB8500_CODEC_CR14_ENVDETCPEN_DISABLED,
	AB8500_CODEC_CR14_ENVDETCPEN_ENABLED
} t_ab8500_codec_cr14_envdetcpen;

/* CR14 - 3:0 */
typedef enum {
	AB8500_CODEC_CR14_ENVET_TIME_27USEC,
	AB8500_CODEC_CR14_ENVET_TIME_53USEC,
	AB8500_CODEC_CR14_ENVET_TIME_106USEC,
	AB8500_CODEC_CR14_ENVET_TIME_212USEC,
	AB8500_CODEC_CR14_ENVET_TIME_424USEC,
	AB8500_CODEC_CR14_ENVET_TIME_848USEC,
	AB8500_CODEC_CR14_ENVET_TIME_1MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_3MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_6MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_13MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_27MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_54MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_109MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_218MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_436MSEC,
	AB8500_CODEC_CR14_ENVET_TIME_872MSEC,
} t_ab8500_codec_cr14_envet_time;

/* CR15 - 7 */
typedef enum {
	AB8500_CODEC_CR15_PWMTOVIBL_DA_PATH,
	AB8500_CODEC_CR15_PWMTOVIBL_PWM
} t_ab8500_codec_cr15_pwmtovibl;

/* CR15 - 6 */
typedef enum {
	AB8500_CODEC_CR15_PWMTOVIBR_DA_PATH,
	AB8500_CODEC_CR15_PWMTOVIBR_PWM
} t_ab8500_codec_cr15_pwmtovibr;

/* CR15 - 5 */
typedef enum {
	AB8500_CODEC_CR15_PWMLCTRL_PWMNPLGPOL,
	AB8500_CODEC_CR15_PWMLCTRL_PWMNPLDUTYCYCLE
} t_ab8500_codec_cr15_pwmlctrl;

/* CR15 - 4 */
typedef enum {
	AB8500_CODEC_CR15_PWMRCTRL_PWMNPRGPOL,
	AB8500_CODEC_CR15_PWMRCTRL_PWMNPRDUTYCYCLE
} t_ab8500_codec_cr15_pwmrctrl;

/* CR15 - 3 */
typedef enum {
	AB8500_CODEC_CR15_PWMNLCTRL_PWMNLGPOL,
	AB8500_CODEC_CR15_PWMNLCTRL_PWMNLDUTYCYCLE
} t_ab8500_codec_cr15_pwmnlctrl;

/* CR15 - 2 */
typedef enum {
	AB8500_CODEC_CR15_PWMPLCTRL_PWMPLGPOL,
	AB8500_CODEC_CR15_PWMPLCTRL_PWMPLDUTYCYCLE
} t_ab8500_codec_cr15_pwmplctrl;

/* CR15 - 1 */
typedef enum {
	AB8500_CODEC_CR15_PWMNRCTRL_PWMNRGPOL,
	AB8500_CODEC_CR15_PWMNRCTRL_PWMNRDUTYCYCLE
} t_ab8500_codec_cr15_pwmnrctrl;

/* CR15 - 0 */
typedef enum {
	AB8500_CODEC_CR15_PWMPRCTRL_PWMPRGPOL,
	AB8500_CODEC_CR15_PWMPRCTRL_PWMPRDUTYCYCLE
} t_ab8500_codec_cr15_pwmprctrl;

/* CR16 - 7 */
typedef enum {
	AB8500_CODEC_CR16_PWMNLPOL_GNDVIB,
	AB8500_CODEC_CR16_PWMNLPOL_VINVIB
} t_ab8500_codec_cr16_pwmnlpol;

/* CR16 - 6:0 */
typedef t_uint8 t_ab8500_codec_cr16_pwmnldutycycle;

/* CR17 - 7 */
typedef enum {
	AB8500_CODEC_CR17_PWMPLPOL_GNDVIB,
	AB8500_CODEC_CR17_PWMPLPOL_VINVIB
} t_ab8500_codec_cr17_pwmplpol;

/* CR17 - 6:0 */
typedef t_uint8 t_ab8500_codec_cr17_pwmpldutycycle;

/* CR18 - 7 */
typedef enum {
	AB8500_CODEC_CR18_PWMNRPOL_GNDVIB,
	AB8500_CODEC_CR18_PWMNRPOL_VINVIB
} t_ab8500_codec_cr18_pwmnrpol;

/* CR18 - 6:0 */
typedef t_uint8 t_ab8500_codec_cr18_pwmnrdutycycle;

/* CR19 - 7 */
typedef enum {
	AB8500_CODEC_CR19_PWMPRPOL_GNDVIB,
	AB8500_CODEC_CR19_PWMPRPOL_VINVIB
} t_ab8500_codec_cr19_pwmprpol;

/* CR19 - 6:0 */
typedef t_uint8 t_ab8500_codec_cr19_pwmprdutycycle;

/* CR20 - 7 */
typedef enum {
	AB8500_CODEC_CR20_EN_SE_MIC1_DIFFERENTIAL,
	AB8500_CODEC_CR20_EN_SE_MIC1_SINGLE
} t_ab8500_codec_cr20_en_se_mic1;

/* CR20 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr20_mic1_gain;

/* CR21 - 7 */
typedef enum {
	AB8500_CODEC_CR21_EN_SE_MIC2_DIFFERENTIAL,
	AB8500_CODEC_CR21_EN_SE_MIC2_SINGLE
} t_ab8500_codec_cr21_en_se_mic2;

/* CR21 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr21_mic2_gain;

/* CR22 - 7:5 */
typedef t_uint8 t_ab8500_codec_cr22_hsl_gain;

/* CR22 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr22_linl_gain;

/* CR23 - 7:5 */
typedef t_uint8 t_ab8500_codec_cr23_hsr_gain;

/* CR23 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr23_linr_gain;

/* CR24 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr24_lintohsl_gain;

/* CR25 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr25_lintohsr_gain;

/* CR26 - 7 */
typedef enum {
	AB8500_CODEC_CR26_AD1NH_FILTER_ENABLED,
	AB8500_CODEC_CR26_AD1NH_FILTER_DISABLED
} t_ab8500_codec_cr26_ad1nh;

/* CR26 - 6 */
typedef enum {
	AB8500_CODEC_CR26_AD2NH_FILTER_ENABLED,
	AB8500_CODEC_CR26_AD2NH_FILTER_DISABLED
} t_ab8500_codec_cr26_ad2nh;

/* CR26 - 5 */
typedef enum {
	AB8500_CODEC_CR26_AD3NH_FILTER_ENABLED,
	AB8500_CODEC_CR26_AD3NH_FILTER_DISABLED
} t_ab8500_codec_cr26_ad3nh;

/* CR26 - 4 */
typedef enum {
	AB8500_CODEC_CR26_AD4NH_FILTER_ENABLED,
	AB8500_CODEC_CR26_AD4NH_FILTER_DISABLED
} t_ab8500_codec_cr26_ad4nh;

/* CR26 - 3 */
typedef enum {
	AB8500_CODEC_CR26_AD1_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR26_AD1_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr26_ad1_voice;

/* CR26 - 2 */
typedef enum {
	AB8500_CODEC_CR26_AD2_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR26_AD2_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr26_ad2_voice;

/* CR26 - 1 */
typedef enum {
	AB8500_CODEC_CR26_AD3_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR26_AD3_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr26_ad3_voice;

/* CR26 - 0 */
typedef enum {
	AB8500_CODEC_CR26_AD4_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR26_AD4_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr26_ad4_voice;

/* CR27 - 7 */
typedef enum {
	AB8500_CODEC_CR27_EN_MASTGEN_DISABLED,
	AB8500_CODEC_CR27_EN_MASTGEN_ENABLED
} t_ab8500_codec_cr27_en_mastgen;

/* CR27 - 6:5 */
typedef enum {
	AB8500_CODEC_CR27_IF1_BITCLK_OSR_32,
	AB8500_CODEC_CR27_IF1_BITCLK_OSR_64,
	AB8500_CODEC_CR27_IF1_BITCLK_OSR_128,
	AB8500_CODEC_CR27_IF1_BITCLK_OSR_256
} t_ab8500_codec_cr27_if1_bitclk_osr;

/* CR27 - 4 */
typedef enum {
	AB8500_CODEC_CR27_ENFS_BITCLK1_DISABLED,
	AB8500_CODEC_CR27_ENFS_BITCLK1_ENABLED
} t_ab8500_codec_cr27_enfs_bitclk1;

/* CR27 - 2:1 */
typedef enum {
	AB8500_CODEC_CR27_IF0_BITCLK_OSR_32,
	AB8500_CODEC_CR27_IF0_BITCLK_OSR_64,
	AB8500_CODEC_CR27_IF0_BITCLK_OSR_128,
	AB8500_CODEC_CR27_IF0_BITCLK_OSR_256
} t_ab8500_codec_cr27_if0_bitclk_osr;

/* CR27 - 0 */
typedef enum {
	AB8500_CODEC_CR27_ENFS_BITCLK0_DISABLED,
	AB8500_CODEC_CR27_ENFS_BITCLK0_ENABLED
} t_ab8500_codec_cr27_enfs_bitclk0;

/* CR28 - 6 */
typedef enum {
	AB8500_CODEC_CR28_FSYNC0P_RISING_EDGE,
	AB8500_CODEC_CR28_FSYNC0P_FALLING_EDGE
} t_ab8500_codec_cr28_fsync0p;

/* CR28 - 5 */
typedef enum {
	AB8500_CODEC_CR28_BITCLK0P_RISING_EDGE,
	AB8500_CODEC_CR28_BITCLK0P_FALLING_EDGE
} t_ab8500_codec_cr28_bitclk0p;

/* CR28 - 4 */
typedef enum {
	AB8500_CODEC_CR28_IF0DEL_NOT_DELAYED,
	AB8500_CODEC_CR28_IF0DEL_DELAYED
} t_ab8500_codec_cr28_if0del;

/* CR28 - 3:2 */
typedef enum {
	AB8500_CODEC_CR28_IF0FORMAT_DISABLED,
	AB8500_CODEC_CR28_IF0FORMAT_TDM,
	AB8500_CODEC_CR28_IF0FORMAT_I2S_LEFTALIGNED
} t_ab8500_codec_cr28_if0format;

/* CR28 - 1:0 */
typedef enum {
	AB8500_CODEC_CR28_IF0WL_16BITS,
	AB8500_CODEC_CR28_IF0WL_20BITS,
	AB8500_CODEC_CR28_IF0WL_24BITS,
	AB8500_CODEC_CR28_IF0WL_32BITS
} t_ab8500_codec_cr28_if0wl;

/* CR29 - 7 */
typedef enum {
	AB8500_CODEC_CR29_IF0DATOIF1AD_NOTSENT,
	AB8500_CODEC_CR29_IF0DATOIF1AD_SENT
} t_ab8500_codec_cr29_if0datoif1ad;

/* CR29 - 6 */
typedef enum {
	AB8500_CODEC_CR29_IF0CKTOIF1CK_NOTSENT,
	AB8500_CODEC_CR29_IF0CKTOIF1CK_SENT
} t_ab8500_codec_cr29_if0cktoif1ck;

/* CR29 - 5 */
typedef enum {
	AB8500_CODEC_CR29_IF1MASTER_FS1CK1_INPUT,
	AB8500_CODEC_CR29_IF1MASTER_FS1CK1_OUTPUT
} t_ab8500_codec_cr29_if1master;

/* CR29 - 3 */
typedef enum {
	AB8500_CODEC_CR29_IF1DATOIF0AD_NOTSENT,
	AB8500_CODEC_CR29_IF1DATOIF0AD_SENT
} t_ab8500_codec_cr29_if1datoif0ad;

/* CR29 - 2 */
typedef enum {
	AB8500_CODEC_CR29_IF1CKTOIF0CK_NOTSENT,
	AB8500_CODEC_CR29_IF1CKTOIF0CK_SENT
} t_ab8500_codec_cr29_if1cktoif0ck;

/* CR29 - 1 */
typedef enum {
	AB8500_CODEC_CR29_IF0MASTER_FS0CK0_INPUT,
	AB8500_CODEC_CR29_IF0MASTER_FS0CK0_OUTPUT
} t_ab8500_codec_cr29_if0master;

/* CR29 - 0 */
typedef enum {
	AB8500_CODEC_CR29_IF0BFIFOEN_NORMAL_MODE,
	AB8500_CODEC_CR29_IF0BFIFOEN_BURST_MODE
} t_ab8500_codec_cr29_if0bfifoen;

/* CR30 - 6 */
typedef enum {
	AB8500_CODEC_CR30_FSYNC1P_RISING_EDGE,
	AB8500_CODEC_CR30_FSYNC1P_FALLING_EDGE
} t_ab8500_codec_cr30_fsync1p;

/* CR30 - 5 */
typedef enum {
	AB8500_CODEC_CR30_BITCLK1P_RISING_EDGE,
	AB8500_CODEC_CR30_BITCLK1P_FALLING_EDGE
} t_ab8500_codec_cr30_bitclk1p;

/* CR30 - 4 */
typedef enum {
	AB8500_CODEC_CR30_IF1DEL_NOT_DELAYED,
	AB8500_CODEC_CR30_IF1DEL_DELAYED
} t_ab8500_codec_cr30_if1del;

/* CR30 - 3:2 */
typedef enum {
	AB8500_CODEC_CR30_IF1FORMAT_DISABLED,
	AB8500_CODEC_CR30_IF1FORMAT_TDM,
	AB8500_CODEC_CR30_IF1FORMAT_I2S_LEFTALIGNED
} t_ab8500_codec_cr30_if1format;

/* CR30 - 1:0 */
typedef enum {
	AB8500_CODEC_CR30_IF1WL_16BITS,
	AB8500_CODEC_CR30_IF1WL_20BITS,
	AB8500_CODEC_CR30_IF1WL_24BITS,
	AB8500_CODEC_CR30_IF1WL_32BITS
} t_ab8500_codec_cr30_if1wl;

/* CR31:46 - 7:4 or 3:0 */
/* In ab8500_codec.h */

/* CR47:50 - 7/6/5/4/3/2/1/0 */
typedef enum {
	AB8500_CODEC_CR47_TO_CR50_HIZ_SL_LOW_IMPEDANCE,
	AB8500_CODEC_CR47_TO_CR50_HIZ_SL_HIGH_IMPEDANCE,
} t_ab8500_codec_cr47_to_cr50_hiz_sl;

/* CR51 - 7 */
typedef enum {
	AB8500_CODEC_CR51_DA12_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR51_DA12_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr51_da12_voice;

/* CR51 - 5 */
typedef enum {
	AB8500_CODEC_CR51_SLDAI1TOSLADO1_NOT_LOOPEDBACK,
	AB8500_CODEC_CR51_SLDAI1TOSLADO1_LOOPEDBACK
} t_ab8500_codec_cr51_sldai1toslado1;

/* CR51:56 - 4:0 */
/* In ab8500_codec.h */

/* CR52 - 5 */
typedef enum {
	AB8500_CODEC_CR52_SLDAI2TOSLADO2_NOT_LOOPEDBACK,
	AB8500_CODEC_CR52_SLDAI2TOSLADO2_LOOPEDBACK
} t_ab8500_codec_cr52_sldai2toslado2;

/* CR53 - 7 */
typedef enum {
	AB8500_CODEC_CR53_DA34_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR53_DA34_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr53_da34_voice;

/* CR53 - 5 */
typedef enum {
	AB8500_CODEC_CR53_SLDAI3TOSLADO3_NOT_LOOPEDBACK,
	AB8500_CODEC_CR53_SLDAI3TOSLADO3_LOOPEDBACK
} t_ab8500_codec_cr53_sldai3toslado3;

/* CR54 - 5 */
typedef enum {
	AB8500_CODEC_CR54_SLDAI4TOSLADO4_NOT_LOOPEDBACK,
	AB8500_CODEC_CR54_SLDAI4TOSLADO4_LOOPEDBACK
} t_ab8500_codec_cr54_sldai4toslado4;

/* CR55 - 7 */
typedef enum {
	AB8500_CODEC_CR55_DA56_VOICE_AUDIOFILTER,
	AB8500_CODEC_CR55_DA56_VOICE_LOWLATENCYFILTER
} t_ab8500_codec_cr55_da56_voice;

/* CR55 - 6:5 */
typedef enum {
	AB8500_CODEC_CR55_SLDAI5TOSLADO5_NOT_LOOPEDBACK,
	AB8500_CODEC_CR55_SLDAI5TOSLADO5_DA_IN1_LOOPEDBACK,
	AB8500_CODEC_CR55_SLDAI5TOSLADO5_DA_IN3_LOOPEDBACK,
	AB8500_CODEC_CR55_SLDAI5TOSLADO5_DA_IN5_LOOPEDBACK
} t_ab8500_codec_cr55_sldai5toslado5;

/* CR56 - 6:5 */
typedef enum {
	AB8500_CODEC_CR56_SLDAI6TOSLADO7_NOT_LOOPEDBACK,
	AB8500_CODEC_CR56_SLDAI6TOSLADO7_DA_IN2_LOOPEDBACK,
	AB8500_CODEC_CR56_SLDAI6TOSLADO7_DA_IN4_LOOPEDBACK,
	AB8500_CODEC_CR56_SLDAI6TOSLADO7_DA_IN6_LOOPEDBACK
} t_ab8500_codec_cr56_sldai6toslado7;

/* CR57 - 6 */
typedef enum {
	AB8500_CODEC_CR57_BFIFULL_MSK_MASKED,
	AB8500_CODEC_CR57_BFIFULL_MSK_ENABLED
} t_ab8500_codec_cr57_bfifull_msk;

/* CR57 - 5 */
typedef enum {
	AB8500_CODEC_CR57_BFIEMPT_MSK_MASKED,
	AB8500_CODEC_CR57_BFIEMPT_MSK_ENABLED
} t_ab8500_codec_cr57_bfiempt_msk;

/* CR57 - 4 */
typedef enum {
	AB8500_CODEC_CR57_DACHAN_MSK_MASKED,
	AB8500_CODEC_CR57_DACHAN_MSK_ENABLED
} t_ab8500_codec_cr57_dachan_msk;

/* CR57 - 3 */
typedef enum {
	AB8500_CODEC_CR57_GAIN_MSK_MASKED,
	AB8500_CODEC_CR57_GAIN_MSK_ENABLED
} t_ab8500_codec_cr57_gain_msk;

/* CR57 - 2 */
typedef enum {
	AB8500_CODEC_CR57_DSPAD_MSK_MASKED,
	AB8500_CODEC_CR57_DSPAD_MSK_ENABLED
} t_ab8500_codec_cr57_dspad_msk;

/* CR57 - 1 */
typedef enum {
	AB8500_CODEC_CR57_DSPDA_MSK_MASKED,
	AB8500_CODEC_CR57_DSPDA_MSK_ENABLED
} t_ab8500_codec_cr57_dspda_msk;

/* CR57 - 0 */
typedef enum {
	AB8500_CODEC_CR57_STFIR_MSK_MASKED,
	AB8500_CODEC_CR57_STFIR_MSK_ENABLED
} t_ab8500_codec_cr57_stfir_msk;

/* CR58 - Read Only */
/* CR58 - 6 */
typedef enum {
	AB8500_CODEC_CR58_BFIFULL_EV_NOT_FULL,
	AB8500_CODEC_CR58_BFIFULL_EV_FULL
} t_ab8500_codec_cr58_bfifull_ev;

/* CR58 - 5 */
typedef enum {
	AB8500_CODEC_CR58_BFIEMPT_EV_NOT_EMPTY,
	AB8500_CODEC_CR58_BFIEMPT_EV_EMPTY
} t_ab8500_codec_cr58_bfiempt_ev;

/* CR58 - 4 */
typedef enum {
	AB8500_CODEC_CR58_DACHAN_EV_NO_SATURATION,
	AB8500_CODEC_CR58_DACHAN_EV_SATURATION
} t_ab8500_codec_cr58_dachan_ev;

/* CR58 - 3 */
typedef enum {
	AB8500_CODEC_CR58_GAIN_EV_NO_SATURATION,
	AB8500_CODEC_CR58_GAIN_EV_SATURATION
} t_ab8500_codec_cr58_gain_ev;

/* CR58 - 2 */
typedef enum {
	AB8500_CODEC_CR58_DSPAD_EV_NO_SATURATION,
	AB8500_CODEC_CR58_DSPAD_EV_SATURATION
} t_ab8500_codec_cr58_dspad_ev;

/* CR58 - 1 */
typedef enum {
	AB8500_CODEC_CR58_DSPDA_EV_NO_SATURATION,
	AB8500_CODEC_CR58_DSPDA_EV_SATURATION
} t_ab8500_codec_cr58_dspda_ev;

/* CR58 - 0 */
typedef enum {
	AB8500_CODEC_CR58_STFIR_EV_NO_SATURATION,
	AB8500_CODEC_CR58_STFIR_EV_SATURATION
} t_ab8500_codec_cr58_stfir_ev;

/* CR59 - 7 */
typedef enum {
	AB8500_CODEC_CR59_VSSREADY_MSK_MASKED,
	AB8500_CODEC_CR59_VSSREADY_MSK_ENABLED
} t_ab8500_codec_cr59_vssready_msk;

/* CR59 - 6 */
typedef enum {
	AB8500_CODEC_CR59_SHRTVIBL_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTVIBL_MSK_ENABLED
} t_ab8500_codec_cr59_shrtvibl_msk;

/* CR59 - 5 */
typedef enum {
	AB8500_CODEC_CR59_SHRTVIBR_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTVIBR_MSK_ENABLED
} t_ab8500_codec_cr59_shrtvibr_msk;

/* CR59 - 4 */
typedef enum {
	AB8500_CODEC_CR59_SHRTHFL_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTHFL_MSK_ENABLED
} t_ab8500_codec_cr59_shrthfl_msk;

/* CR59 - 3 */
typedef enum {
	AB8500_CODEC_CR59_SHRTHFR_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTHFR_MSK_ENABLED
} t_ab8500_codec_cr59_shrthfr_msk;

/* CR59 - 2 */
typedef enum {
	AB8500_CODEC_CR59_SHRTHSL_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTHSL_MSK_ENABLED
} t_ab8500_codec_cr59_shrthsl_msk;

/* CR59 - 1 */
typedef enum {
	AB8500_CODEC_CR59_SHRTHSR_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTHSR_MSK_ENABLED
} t_ab8500_codec_cr59_shrthsr_msk;

/* CR59 - 0 */
typedef enum {
	AB8500_CODEC_CR59_SHRTEAR_MSK_MASKED,
	AB8500_CODEC_CR59_SHRTEAR_MSK_ENABLED
} t_ab8500_codec_cr59_shrtear_msk;

/* CR60 - Read Only */
/* CR60 - 7 */
typedef enum {
	AB8500_CODEC_CR60_VSSREADY_EV_NOT_READY,
	AB8500_CODEC_CR60_VSSREADY_EV_READY
} t_ab8500_codec_cr60_vssready_ev;

/* CR60 - 6 */
typedef enum {
	AB8500_CODEC_CR60_SHRTVIBL_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTVIBL_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrtvibl_ev;

/* CR60 - 5 */
typedef enum {
	AB8500_CODEC_CR60_SHRTVIBR_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTVIBR_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrtvibr_ev;

/* CR60 - 4 */
typedef enum {
	AB8500_CODEC_CR60_SHRTHFL_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTHFL_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrthfl_ev;

/* CR60 - 3 */
typedef enum {
	AB8500_CODEC_CR60_SHRTHFR_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTHFR_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrthfr_ev;

/* CR60 - 2 */
typedef enum {
	AB8500_CODEC_CR60_SHRTHSL_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTHSL_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrthsl_ev;

/* CR60 - 1 */
typedef enum {
	AB8500_CODEC_CR60_SHRTHSR_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTHSR_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrthsr_ev;

/* CR60 - 0 */
typedef enum {
	AB8500_CODEC_CR60_SHRTEAR_EV_NO_SHORTCIRCUIT,
	AB8500_CODEC_CR60_SHRTEAR_EV_SHORTCIRCUIT
} t_ab8500_codec_cr60_shrtear_ev;

/* CR61 - 6:2 - Read Only */
typedef enum {
	AB8500_CODEC_CR61_REVISION_1_0,
	AB8500_CODEC_CR61_REVISION_TBD
} t_ab8500_codec_cr61_revision;

/* CR61 - 1:0 */
typedef enum {
	AB8500_CODEC_CR61_FADE_SPEED_1MS,
	AB8500_CODEC_CR61_FADE_SPEED_4MS,
	AB8500_CODEC_CR61_FADE_SPEED_8MS,
	AB8500_CODEC_CR61_FADE_SPEED_16MS
} t_ab8500_codec_cr61_fade_speed;

/* CR62 - Read Only */
/* CR62 - 5 */
typedef enum {
	AB8500_CODEC_CR62_DMIC1SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC1SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic1sinc3;

/* CR62 - 4 */
typedef enum {
	AB8500_CODEC_CR62_DMIC2SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC2SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic2sinc3;

/* CR62 - 3 */
typedef enum {
	AB8500_CODEC_CR62_DMIC3SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC3SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic3sinc3;

/* CR62 - 2 */
typedef enum {
	AB8500_CODEC_CR62_DMIC4SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC4SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic4sinc3;

/* CR62 - 1 */
typedef enum {
	AB8500_CODEC_CR62_DMIC5SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC5SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic5sinc3;

/* CR62 - 0 */
typedef enum {
	AB8500_CODEC_CR62_DMIC6SINC3_SINC5_SELECTED,
	AB8500_CODEC_CR62_DMIC6SINC3_SINC3_SELECTED
} t_ab8500_codec_cr62_dmic6sinc3;

/* CR63 - 7 */
typedef enum {
	AB8500_CODEC_CR63_DATOHSLEN_DISABLED,
	AB8500_CODEC_CR63_DATOHSLEN_ENABLED
} t_ab8500_codec_cr63_datohslen;

/* CR63 - 6 */
typedef enum {
	AB8500_CODEC_CR63_DATOHSREN_DISABLED,
	AB8500_CODEC_CR63_DATOHSREN_ENABLED
} t_ab8500_codec_cr63_datohsren;

/* CR63 - 5 */
typedef enum {
	AB8500_CODEC_CR63_AD1SEL_LINLADL_SELECTED,
	AB8500_CODEC_CR63_AD1SEL_DMIC1_SELECTED
} t_ab8500_codec_cr63_ad1sel;

/* CR63 - 4 */
typedef enum {
	AB8500_CODEC_CR63_AD2SEL_LINRADR_SELECTED,
	AB8500_CODEC_CR63_AD2SEL_DMIC2_SELECTED
} t_ab8500_codec_cr63_ad2sel;

/* CR63 - 3 */
typedef enum {
	AB8500_CODEC_CR63_AD3SEL_ADMO_SELECTED,
	AB8500_CODEC_CR63_AD3SEL_DMIC3_SELECTED
} t_ab8500_codec_cr63_ad3sel;

/* CR63 - 2 */
typedef enum {
	AB8500_CODEC_CR63_AD5SEL_AMADR_SELECTED,
	AB8500_CODEC_CR63_AD5SEL_DMIC5_SELECTED
} t_ab8500_codec_cr63_ad5sel;

/* CR63 - 1 */
typedef enum {
	AB8500_CODEC_CR63_AD6SEL_ADMO_SELECTED,
	AB8500_CODEC_CR63_AD6SEL_DMIC6_SELECTED
} t_ab8500_codec_cr63_ad6sel;

/* CR63 - 0 */
typedef enum {
	AB8500_CODEC_CR63_ANCSEL_NOT_MIXED_IN_EAR,
	AB8500_CODEC_CR63_ANCSEL_MIXED_IN_EAR
} t_ab8500_codec_cr63_ancsel;

/* CR64 - 7 */
typedef enum {
	AB8500_CODEC_CR64_DATOHFREN_NOT_MIXED_TO_HFR,
	AB8500_CODEC_CR64_DATOHFREN_MIXED_TO_HFR
} t_ab8500_codec_cr64_datohfren;

/* CR64 - 6 */
typedef enum {
	AB8500_CODEC_CR64_DATOHFLEN_NOT_MIXED_TO_HFL,
	AB8500_CODEC_CR64_DATOHFLEN_MIXED_TO_HFL
} t_ab8500_codec_cr64_datohflen;

/* CR64 - 5 */
typedef enum {
	AB8500_CODEC_CR64_HFRSEL_DA4_MIXED_TO_HFR,
	AB8500_CODEC_CR64_HFRSEL_ANC_MIXED_TO_HFR
} t_ab8500_codec_cr64_hfrsel;

/* CR64 - 4 */
typedef enum {
	AB8500_CODEC_CR64_HFLSEL_DA3_MIXED_TO_HFL,
	AB8500_CODEC_CR64_HFLSEL_ANC_MIXED_TO_HFL
} t_ab8500_codec_cr64_hflsel;

/* CR64 - 3:2 */
typedef enum {
	AB8500_CODEC_CR64_STFIR1SEL_AD_OUT1_SELECTED,
	AB8500_CODEC_CR64_STFIR1SEL_AD_OUT3_SELECTED,
	AB8500_CODEC_CR64_STFIR1SEL_DA_IN1_SELECTED
} t_ab8500_codec_cr64_stfir1sel;

/* CR64 - 1:0 */
typedef enum {
	AB8500_CODEC_CR64_STFIR2SEL_AD_OUT2_SELECTED,
	AB8500_CODEC_CR64_STFIR2SEL_AD_OUT4_SELECTED,
	AB8500_CODEC_CR64_STFIR2SEL_DA_IN2_SELECTED
} t_ab8500_codec_cr64_stfir2sel;

/* CR65 - 6 */
typedef enum {
	AB8500_CODEC_CR65_FADEDIS_AD1_ENABLED,
	AB8500_CODEC_CR65_FADEDIS_AD1_DISABLED
} t_ab8500_codec_cr65_fadedis_ad1;

/* CR65 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr65_ad1gain;

/* CR66 - 6 */
typedef enum {
	AB8500_CODEC_CR66_FADEDIS_AD2_ENABLED,
	AB8500_CODEC_CR66_FADEDIS_AD2_DISABLED
} t_ab8500_codec_cr66_fadedis_ad2;

/* CR66 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr66_ad2gain;

/* CR67 - 6 */
typedef enum {
	AB8500_CODEC_CR67_FADEDIS_AD3_ENABLED,
	AB8500_CODEC_CR67_FADEDIS_AD3_DISABLED
} t_ab8500_codec_cr67_fadedis_ad3;

/* CR67 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr67_ad3gain;

/* CR68 - 6 */
typedef enum {
	AB8500_CODEC_CR68_FADEDIS_AD4_ENABLED,
	AB8500_CODEC_CR68_FADEDIS_AD4_DISABLED
} t_ab8500_codec_cr68_fadedis_ad4;

/* CR68 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr68_ad4gain;

/* CR69 - 6 */
typedef enum {
	AB8500_CODEC_CR69_FADEDIS_AD5_ENABLED,
	AB8500_CODEC_CR69_FADEDIS_AD5_DISABLED
} t_ab8500_codec_cr69_fadedis_ad5;

/* CR69 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr69_ad5gain;

/* CR70 - 6 */
typedef enum {
	AB8500_CODEC_CR70_FADEDIS_AD6_ENABLED,
	AB8500_CODEC_CR70_FADEDIS_AD6_DISABLED
} t_ab8500_codec_cr70_fadedis_ad6;

/* CR70 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr70_ad6gain;

/* CR71 - 6 */
typedef enum {
	AB8500_CODEC_CR71_FADEDIS_DA1_ENABLED,
	AB8500_CODEC_CR71_FADEDIS_DA1_DISABLED
} t_ab8500_codec_cr71_fadedis_da1;

/* CR71 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr71_da1gain;

/* CR72 - 6 */
typedef enum {
	AB8500_CODEC_CR72_FADEDIS_DA2_ENABLED,
	AB8500_CODEC_CR72_FADEDIS_DA2_DISABLED
} t_ab8500_codec_cr72_fadedis_da2;

/* CR72 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr72_da2gain;

/* CR73 - 6 */
typedef enum {
	AB8500_CODEC_CR73_FADEDIS_DA3_ENABLED,
	AB8500_CODEC_CR73_FADEDIS_DA3_DISABLED
} t_ab8500_codec_cr73_fadedis_da3;

/* CR73 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr73_da3gain;

/* CR74 - 6 */
typedef enum {
	AB8500_CODEC_CR74_FADEDIS_DA4_ENABLED,
	AB8500_CODEC_CR74_FADEDIS_DA4_DISABLED
} t_ab8500_codec_cr74_fadedis_da4;

/* CR74 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr74_da4gain;

/* CR75 - 6 */
typedef enum {
	AB8500_CODEC_CR75_FADEDIS_DA5_ENABLED,
	AB8500_CODEC_CR75_FADEDIS_DA5_DISABLED
} t_ab8500_codec_cr75_fadedis_da5;

/* CR75 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr75_da5gain;

/* CR76 - 6 */
typedef enum {
	AB8500_CODEC_CR76_FADEDIS_DA6_ENABLED,
	AB8500_CODEC_CR76_FADEDIS_DA6_DISABLED
} t_ab8500_codec_cr76_fadedis_da6;

/* CR76 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr76_da6gain;

/* CR77 - 6 */
typedef enum {
	AB8500_CODEC_CR77_FADEDIS_AD1L_TO_HFL_ENABLED,
	AB8500_CODEC_CR77_FADEDIS_AD1L_TO_HFL_DISABLED
} t_ab8500_codec_cr77_fadedis_ad1l;

/* CR77 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr77_ad1lbgain_to_hfl;

/* CR78 - 6 */
typedef enum {
	AB8500_CODEC_CR78_FADEDIS_AD2L_TO_HFR_ENABLED,
	AB8500_CODEC_CR78_FADEDIS_AD2L_TO_HFR_DISABLED
} t_ab8500_codec_cr78_fadedis_ad2l;

/* CR78 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr78_ad2lbgain_to_hfr;

/* CR79 - 7 */
typedef enum {
	AB8500_CODEC_CR79_HSSINC1_SINC3_CHOOSEN,
	AB8500_CODEC_CR79_HSSINC1_SINC1_CHOOSEN
} t_ab8500_codec_cr79_hssinc1;

/* CR79 - 4 */
typedef enum {
	AB8500_CODEC_CR79_FADEDIS_HSL_ENABLED,
	AB8500_CODEC_CR79_FADEDIS_HSL_DISABLED
} t_ab8500_codec_cr79_fadedis_hsl;

/* CR79 - 3:0 */
typedef t_uint8 t_ab8500_codec_cr79_hsldgain;

/* CR80 - 4 */
typedef enum {
	AB8500_CODEC_CR80_FADEDIS_HSR_ENABLED,
	AB8500_CODEC_CR80_FADEDIS_HSR_DISABLED
} t_ab8500_codec_cr80_fadedis_hsr;

/* CR80 - 3:0 */
typedef t_uint8 t_ab8500_codec_cr80_hsrdgain;

/* CR81 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr81_stfir1gain;

/* CR82 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr82_stfir2gain;

/* CR83 - 2 */
typedef enum {
	AB8500_CODEC_CR83_ENANC_DISABLED,
	AB8500_CODEC_CR83_ENANC_ENABLED
} t_ab8500_codec_cr83_enanc;

/* CR83 - 1 */
typedef enum {
	AB8500_CODEC_CR83_ANCIIRINIT_NOT_STARTED,
	AB8500_CODEC_CR83_ANCIIRINIT_STARTED
} t_ab8500_codec_cr83_anciirinit;

/* CR83 - 0 */
typedef enum {
	AB8500_CODEC_CR83_ANCFIRUPDATE_RESETTED,
	AB8500_CODEC_CR83_ANCFIRUPDATE_NOT_RESETTED
} t_ab8500_codec_cr83_ancfirupdate;

/* CR84 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr84_ancinshift;

/* CR85 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr85_ancfiroutshift;

/* CR86 - 4:0 */
typedef t_uint8 t_ab8500_codec_cr86_ancshiftout;

/* CR87 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr87_ancfircoeff_msb;

/* CR88 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr88_ancfircoeff_lsb;

/* CR89 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr89_anciircoeff_msb;

/* CR90 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr90_anciircoeff_lsb;

/* CR91 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr91_ancwarpdel_msb;

/* CR92 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr92_ancwarpdel_lsb;

/* CR93 - Read Only */
/* CR93 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr93_ancfirpeak_msb;

/* CR94 - Read Only */
/* CR94 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr94_ancfirpeak_lsb;

/* CR95 - Read Only */
/* CR95 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr95_anciirpeak_msb;

/* CR96 - Read Only */
/* CR96 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr96_anciirpeak_lsb;

/* CR97 - 7 */
typedef enum {
	AB8500_CODEC_CR97_STFIR_SET_LAST_NOT_APPLIED,
	AB8500_CODEC_CR97_STFIR_SET_LAST_APPLIED
} t_ab8500_codec_cr97_stfir_set;

/* CR97 - 6:0 */
typedef t_uint8 t_ab8500_codec_cr97_stfir_addr;

/* CR98 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr98_stfir_coeff_msb;

/* CR99 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr99_stfir_coeff_lsb;

/* CR100 - 2 */
typedef enum {
	AB8500_CODEC_CR100_ENSTFIRS_DISABLED,
	AB8500_CODEC_CR100_ENSTFIRS_ENABLED
} t_ab8500_codec_cr100_enstfirs;

/* CR100 - 1 */
typedef enum {
	AB8500_CODEC_CR100_STFIRSTOIF1_AUD_IF0_DATA_RATE,
	AB8500_CODEC_CR100_STFIRSTOIF1_AUD_IF1_DATA_RATE
} t_ab8500_codec_cr100_stfirstoif1;

/* CR100 - 0 */
typedef enum {
	AB8500_CODEC_CR100_STFIR_BUSY_READY,
	AB8500_CODEC_CR100_STFIR_BUSY_NOT_READY
} t_ab8500_codec_cr100_stfir_busy;

/* CR101 - 7 */
typedef enum {
	AB8500_CODEC_CR101_PARLHF_INDEPENDENT,
	AB8500_CODEC_CR101_PARLHF_BRIDGED
} t_ab8500_codec_cr101_parlhf;

/* CR101 - 6 */
typedef enum {
	AB8500_CODEC_CR101_PARLVIB_INDEPENDENT,
	AB8500_CODEC_CR101_PARLVIB_BRIDGED
} t_ab8500_codec_cr101_parlvib;

/* CR101 - 3 */
typedef enum {
	AB8500_CODEC_CR101_CLASSD_VIBLSWAPEN_DISABLED,
	AB8500_CODEC_CR101_CLASSD_VIBLSWAPEN_ENABLED
} t_ab8500_codec_cr101_classd_viblswapen;

/* CR101 - 2 */
typedef enum {
	AB8500_CODEC_CR101_CLASSD_VIBRSWAPEN_DISABLED,
	AB8500_CODEC_CR101_CLASSD_VIBRSWAPEN_ENABLED
} t_ab8500_codec_cr101_classd_vibrswapen;

/* CR101 - 1 */
typedef enum {
	AB8500_CODEC_CR101_CLASSD_HFLSWAPEN_DISABLED,
	AB8500_CODEC_CR101_CLASSD_HFLSWAPEN_ENABLED
} t_ab8500_codec_cr101_classd_hflswapen;

/* CR101 - 0 */
typedef enum {
	AB8500_CODEC_CR101_CLASSD_HFRSWAPEN_DISABLED,
	AB8500_CODEC_CR101_CLASSD_HFRSWAPEN_ENABLED
} t_ab8500_codec_cr101_classd_hfrswapen;

/* CR102 - 7:4 */
typedef enum {
	AB8500_CODEC_CR102_CLASSD_FIRBYP_ALL_ENABLED = 0,
	AB8500_CODEC_CR102_CLASSD_FIRBYP_HFL_BYPASSED = 1,
	AB8500_CODEC_CR102_CLASSD_FIRBYP_HFR_BYPASSED = 2,
	AB8500_CODEC_CR102_CLASSD_FIRBYP_VIBL_BYPASSED = 4,
	AB8500_CODEC_CR102_CLASSD_FIRBYP_VIBR_BYPASSED = 8
} t_ab8500_codec_cr102_classd_firbyp;

/* CR102 - 3:0 */
typedef enum {
	AB8500_CODEC_CR102_CLASSD_HIGHVOLEN_DISABLED = 0,
	AB8500_CODEC_CR102_CLASSD_HIGHVOLEN_HFL_HIGHVOL = 1,
	AB8500_CODEC_CR102_CLASSD_HIGHVOLEN_HFR_HIGHVOL = 2,
	AB8500_CODEC_CR102_CLASSD_HIGHVOLEN_VIBL_HIGHVOL = 4,
	AB8500_CODEC_CR102_CLASSD_HIGHVOLEN_VIBR_HIGHVOL = 8
} t_ab8500_codec_cr102_classd_highvolen;

/* CR103 - 7:4 */
typedef t_uint8 t_ab8500_codec_cr103_classd_ditherhpgain;

/* CR103 - 3:0 */
typedef t_uint8 t_ab8500_codec_cr103_classd_ditherwgain;

/* CR104 - 5:0 */
/* In ab8500_codec.h */

/* CR105 - 7:0 */
/* In ab8500_codec.h */

/* CR106 - 6:4 */
/* In ab8500_codec.h */

/* CR106 - 2 */
/* In ab8500_codec.h */

/* CR106 - 1 */
/* In ab8500_codec.h */

/* CR106 - 0 */
/* In ab8500_codec.h */

/* CR107 - 7:0 */
/* In ab8500_codec.h */

/* CR108 - 7:0 */
/* In ab8500_codec.h */

/* CR109 - Read Only */
/* CR109 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr109_bfifosamples;

typedef enum {
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT1,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT2,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT3,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT4,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT5,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT6,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT7,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_OUT8,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_ZEROS,
	AB8500_CODEC_CR31_TO_CR46_SLOT_IS_TRISTATE = 15,
	AB8500_CODEC_CR31_TO_CR46_SLOT_OUTPUTS_DATA_FROM_AD_UNDEFINED
} t_ab8500_codec_cr31_to_cr46_ad_data_allocation;

typedef enum {
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT00,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT01,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT02,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT03,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT04,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT05,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT06,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT07,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT08,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT09,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT10,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT11,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT12,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT13,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT14,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT15,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT16,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT17,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT18,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT19,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT20,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT21,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT22,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT23,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT24,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT25,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT26,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT27,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT28,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT29,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT30,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT31,
	AB8500_CODEC_CR51_TO_CR56_SLTODA_SLOT_UNDEFINED
} t_ab8500_codec_cr51_to_cr56_sltoda;

/* CR104 - 5:0 */
typedef t_uint8 t_ab8500_codec_cr104_bfifoint;

/* CR105 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr105_bfifotx;

/* CR106 - 6:4 */
typedef enum {
	AB8500_CODEC_CR106_BFIFOFSEXT_NO_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_1SLOT_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_2SLOT_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_3SLOT_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_4SLOT_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_5SLOT_EXTRA_CLK,
	AB8500_CODEC_CR106_BFIFOFSEXT_6SLOT_EXTRA_CLK
} t_ab8500_codec_cr106_bfifofsext;

/* CR106 - 2 */
typedef enum {
	AB8500_CODEC_CR106_BFIFOMSK_AD_DATA0_UNMASKED,
	AB8500_CODEC_CR106_BFIFOMSK_AD_DATA0_MASKED
} t_ab8500_codec_cr106_bfifomsk;

/* CR106 - 1 */
typedef enum {
	AB8500_CODEC_CR106_BFIFOMSTR_SLAVE_MODE,
	AB8500_CODEC_CR106_BFIFOMSTR_MASTER_MODE
} t_ab8500_codec_cr106_bfifomstr;

/* CR106 - 0 */
typedef enum {
	AB8500_CODEC_CR106_BFIFOSTRT_STOPPED,
	AB8500_CODEC_CR106_BFIFOSTRT_RUNNING
} t_ab8500_codec_cr106_bfifostrt;

/* CR107 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr107_bfifosampnr;

/* CR108 - 7:0 */
typedef t_uint8 t_ab8500_codec_cr108_bfifowakeup;

/*configuration structure for AB8500 Codec*/
typedef struct {
	/* CR0  */
	t_ab8500_codec_cr0_powerup cr0_powerup;
	t_ab8500_codec_cr0_enaana cr0_enaana;

	/* CR1  */
	t_ab8500_codec_cr1_swreset cr1_swreset;

	/* CR2  */
	t_ab8500_codec_cr2_enad1 cr2_enad1;
	t_ab8500_codec_cr2_enad2 cr2_enad2;
	t_ab8500_codec_cr2_enad3 cr2_enad3;
	t_ab8500_codec_cr2_enad4 cr2_enad4;
	t_ab8500_codec_cr2_enad5 cr2_enad5;
	t_ab8500_codec_cr2_enad6 cr2_enad6;

	/* CR3  */
	t_ab8500_codec_cr3_enda1 cr3_enda1;
	t_ab8500_codec_cr3_enda2 cr3_enda2;
	t_ab8500_codec_cr3_enda3 cr3_enda3;
	t_ab8500_codec_cr3_enda4 cr3_enda4;
	t_ab8500_codec_cr3_enda5 cr3_enda5;
	t_ab8500_codec_cr3_enda6 cr3_enda6;

	/* CR4  */
	t_ab8500_codec_cr4_lowpowhs cr4_lowpowhs;
	t_ab8500_codec_cr4_lowpowdachs cr4_lowpowdachs;
	t_ab8500_codec_cr4_lowpowear cr4_lowpowear;
	t_ab8500_codec_cr4_ear_sel_cm cr4_ear_sel_cm;
	t_ab8500_codec_cr4_hs_hp_dis cr4_hs_hp_dis;
	t_ab8500_codec_cr4_ear_hp_dis cr4_ear_hp_dis;

	/* CR5  */
	t_ab8500_codec_cr5_enmic1 cr5_enmic1;
	t_ab8500_codec_cr5_enmic2 cr5_enmic2;
	t_ab8500_codec_cr5_enlinl cr5_enlinl;
	t_ab8500_codec_cr5_enlinr cr5_enlinr;
	t_ab8500_codec_cr5_mutmic1 cr5_mutmic1;
	t_ab8500_codec_cr5_mutmic2 cr5_mutmic2;
	t_ab8500_codec_cr5_mutlinl cr5_mutlinl;
	t_ab8500_codec_cr5_mutlinr cr5_mutlinr;

	/* CR6  */
	t_ab8500_codec_cr6_endmic1 cr6_endmic1;
	t_ab8500_codec_cr6_endmic2 cr6_endmic2;
	t_ab8500_codec_cr6_endmic3 cr6_endmic3;
	t_ab8500_codec_cr6_endmic4 cr6_endmic4;
	t_ab8500_codec_cr6_endmic5 cr6_endmic5;
	t_ab8500_codec_cr6_endmic6 cr6_endmic6;

	/* CR7  */
	t_ab8500_codec_cr7_mic1sel cr7_mic1sel;
	t_ab8500_codec_cr7_linrsel cr7_linrsel;
	t_ab8500_codec_cr7_endrvhsl cr7_endrvhsl;
	t_ab8500_codec_cr7_endrvhsr cr7_endrvhsr;
	t_ab8500_codec_cr7_enadcmic cr7_enadcmic;
	t_ab8500_codec_cr7_enadclinl cr7_enadclinl;
	t_ab8500_codec_cr7_enadclinr cr7_enadclinr;

	/* CR8  */
	t_ab8500_codec_cr8_cp_dis_pldwn cr8_cp_dis_pldwn;
	t_ab8500_codec_cr8_enear cr8_enear;
	t_ab8500_codec_cr8_enhsl cr8_enhsl;
	t_ab8500_codec_cr8_enhsr cr8_enhsr;
	t_ab8500_codec_cr8_enhfl cr8_enhfl;
	t_ab8500_codec_cr8_enhfr cr8_enhfr;
	t_ab8500_codec_cr8_envibl cr8_envibl;
	t_ab8500_codec_cr8_envibr cr8_envibr;

	/* CR9  */
	t_ab8500_codec_cr9_endacear cr9_endacear;
	t_ab8500_codec_cr9_endachsl cr9_endachsl;
	t_ab8500_codec_cr9_endachsr cr9_endachsr;
	t_ab8500_codec_cr9_endachfl cr9_endachfl;
	t_ab8500_codec_cr9_endachfr cr9_endachfr;
	t_ab8500_codec_cr9_endacvibl cr9_endacvibl;
	t_ab8500_codec_cr9_endacvibr cr9_endacvibr;

	/* CR10  */
	t_ab8500_codec_cr10_muteear cr10_muteear;
	t_ab8500_codec_cr10_mutehsl cr10_mutehsl;
	t_ab8500_codec_cr10_mutehsr cr10_mutehsr;
	t_ab8500_codec_cr10_mutehfl cr10_mutehfl;
	t_ab8500_codec_cr10_mutehfr cr10_mutehfr;
	t_ab8500_codec_cr10_mutevibl cr10_mutevibl;
	t_ab8500_codec_cr10_mutevibr cr10_mutevibr;

	/* CR11  */
	t_ab8500_codec_cr11_earshortpwd cr11_earshortpwd;
	t_ab8500_codec_cr11_earshortdis cr11_earshortdis;
	t_ab8500_codec_cr11_hslshortdis cr11_hslshortdis;
	t_ab8500_codec_cr11_hsrshortdis cr11_hsrshortdis;
	t_ab8500_codec_cr11_hflshortdis cr11_hflshortdis;
	t_ab8500_codec_cr11_hfrshortdis cr11_hfrshortdis;
	t_ab8500_codec_cr11_viblshortdis cr11_viblshortdis;
	t_ab8500_codec_cr11_vibrshortdis cr11_vibrshortdis;

	/* CR12  */
	t_ab8500_codec_cr12_encphs cr12_encphs;
	t_ab8500_codec_cr12_hsautotime cr12_hsautotime;
	t_ab8500_codec_cr12_hsautoensel cr12_hsautoensel;
	t_ab8500_codec_cr12_hsautoen cr12_hsautoen;

	/* CR13  */
	t_ab8500_codec_cr13_envdet_hthresh cr13_envdet_hthresh;
	t_ab8500_codec_cr13_envdet_lthresh cr13_envdet_lthresh;

	/* CR14  */
	t_ab8500_codec_cr14_smpslven cr14_smpslven;
	t_ab8500_codec_cr14_envdetsmpsen cr14_envdetsmpsen;
	t_ab8500_codec_cr14_cplven cr14_cplven;
	t_ab8500_codec_cr14_envdetcpen cr14_envdetcpen;
	t_ab8500_codec_cr14_envet_time cr14_envet_time;

	/* CR15  */
	t_ab8500_codec_cr15_pwmtovibl cr15_pwmtovibl;
	t_ab8500_codec_cr15_pwmtovibr cr15_pwmtovibr;
	t_ab8500_codec_cr15_pwmlctrl cr15_pwmlctrl;
	t_ab8500_codec_cr15_pwmrctrl cr15_pwmrctrl;
	t_ab8500_codec_cr15_pwmnlctrl cr15_pwmnlctrl;
	t_ab8500_codec_cr15_pwmplctrl cr15_pwmplctrl;
	t_ab8500_codec_cr15_pwmnrctrl cr15_pwmnrctrl;
	t_ab8500_codec_cr15_pwmprctrl cr15_pwmprctrl;

	/* CR16  */
	t_ab8500_codec_cr16_pwmnlpol cr16_pwmnlpol;
	t_ab8500_codec_cr16_pwmnldutycycle cr16_pwmnldutycycle;

	/* CR17  */
	t_ab8500_codec_cr17_pwmplpol cr17_pwmplpol;
	t_ab8500_codec_cr17_pwmpldutycycle cr17_pwmpldutycycle;

	/* CR18  */
	t_ab8500_codec_cr18_pwmnrpol cr18_pwmnrpol;
	t_ab8500_codec_cr18_pwmnrdutycycle cr18_pwmnrdutycycle;

	/* CR19  */
	t_ab8500_codec_cr19_pwmprpol cr19_pwmprpol;
	t_ab8500_codec_cr19_pwmprdutycycle cr19_pwmprdutycycle;

	/* CR20  */
	t_ab8500_codec_cr20_en_se_mic1 cr20_en_se_mic1;
	t_ab8500_codec_cr20_mic1_gain cr20_mic1_gain;

	/* CR21  */
	t_ab8500_codec_cr21_en_se_mic2 cr21_en_se_mic2;
	t_ab8500_codec_cr21_mic2_gain cr21_mic2_gain;

	/* CR22  */
	t_ab8500_codec_cr22_hsl_gain cr22_hsl_gain;
	t_ab8500_codec_cr22_linl_gain cr22_linl_gain;

	/* CR23  */
	t_ab8500_codec_cr23_hsr_gain cr23_hsr_gain;
	t_ab8500_codec_cr23_linr_gain cr23_linr_gain;

	/* CR24  */
	t_ab8500_codec_cr24_lintohsl_gain cr24_lintohsl_gain;

	/* CR25  */
	t_ab8500_codec_cr25_lintohsr_gain cr25_lintohsr_gain;

	/* CR26  */
	t_ab8500_codec_cr26_ad1nh cr26_ad1nh;
	t_ab8500_codec_cr26_ad2nh cr26_ad2nh;
	t_ab8500_codec_cr26_ad3nh cr26_ad3nh;
	t_ab8500_codec_cr26_ad4nh cr26_ad4nh;
	t_ab8500_codec_cr26_ad1_voice cr26_ad1_voice;
	t_ab8500_codec_cr26_ad2_voice cr26_ad2_voice;
	t_ab8500_codec_cr26_ad3_voice cr26_ad3_voice;
	t_ab8500_codec_cr26_ad4_voice cr26_ad4_voice;

	/* CR27  */
	t_ab8500_codec_cr27_en_mastgen cr27_en_mastgen;
	t_ab8500_codec_cr27_if1_bitclk_osr cr27_if1_bitclk_osr;
	t_ab8500_codec_cr27_enfs_bitclk1 cr27_enfs_bitclk1;
	t_ab8500_codec_cr27_if0_bitclk_osr cr27_if0_bitclk_osr;
	t_ab8500_codec_cr27_enfs_bitclk0 cr27_enfs_bitclk0;

	/* CR28  */
	t_ab8500_codec_cr28_fsync0p cr28_fsync0p;
	t_ab8500_codec_cr28_bitclk0p cr28_bitclk0p;
	t_ab8500_codec_cr28_if0del cr28_if0del;
	t_ab8500_codec_cr28_if0format cr28_if0format;
	t_ab8500_codec_cr28_if0wl cr28_if0wl;

	/* CR29  */
	t_ab8500_codec_cr29_if0datoif1ad cr29_if0datoif1ad;
	t_ab8500_codec_cr29_if0cktoif1ck cr29_if0cktoif1ck;
	t_ab8500_codec_cr29_if1master cr29_if1master;
	t_ab8500_codec_cr29_if1datoif0ad cr29_if1datoif0ad;
	t_ab8500_codec_cr29_if1cktoif0ck cr29_if1cktoif0ck;
	t_ab8500_codec_cr29_if0master cr29_if0master;
	t_ab8500_codec_cr29_if0bfifoen cr29_if0bfifoen;

	/* CR30  */
	t_ab8500_codec_cr30_fsync1p cr30_fsync1p;
	t_ab8500_codec_cr30_bitclk1p cr30_bitclk1p;
	t_ab8500_codec_cr30_if1del cr30_if1del;
	t_ab8500_codec_cr30_if1format cr30_if1format;
	t_ab8500_codec_cr30_if1wl cr30_if1wl;

	/* CR31  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr31_adotoslot1;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr31_adotoslot0;

	/* CR32  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr32_adotoslot3;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr32_adotoslot2;

	/* CR33  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr33_adotoslot5;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr33_adotoslot4;

	/* CR34  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr34_adotoslot7;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr34_adotoslot6;

	/* CR35  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr35_adotoslot9;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr35_adotoslot8;

	/* CR36  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr36_adotoslot11;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr36_adotoslot10;

	/* CR37  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr37_adotoslot13;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr37_adotoslot12;

	/* CR38  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr38_adotoslot15;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr38_adotoslot14;

	/* CR39  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr39_adotoslot17;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr39_adotoslot16;

	/* CR40  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr40_adotoslot19;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr40_adotoslot18;

	/* CR41  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr41_adotoslot21;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr41_adotoslot20;

	/* CR42  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr42_adotoslot23;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr42_adotoslot22;

	/* CR43  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr43_adotoslot25;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr43_adotoslot24;

	/* CR44  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr44_adotoslot27;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr44_adotoslot26;

	/* CR45  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr45_adotoslot29;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr45_adotoslot28;

	/* CR46  */
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr46_adotoslot31;
	t_ab8500_codec_cr31_to_cr46_ad_data_allocation cr46_adotoslot30;

	/* CR47  */
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl7;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl6;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl5;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl4;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl3;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl2;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl1;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr47_hiz_sl0;

	/* CR48  */
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl15;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl14;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl13;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl12;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl11;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl10;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl9;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr48_hiz_sl8;

	/* CR49  */
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl23;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl22;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl21;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl20;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl19;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl18;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl17;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr49_hiz_sl16;

	/* CR50  */
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl31;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl30;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl29;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl28;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl27;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl26;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl25;
	t_ab8500_codec_cr47_to_cr50_hiz_sl cr50_hiz_sl24;

	/* CR51  */
	t_ab8500_codec_cr51_da12_voice cr51_da12_voice;
	t_ab8500_codec_cr51_sldai1toslado1 cr51_sldai1toslado1;
	t_ab8500_codec_cr51_to_cr56_sltoda cr51_sltoda1;

	/* CR52  */
	t_ab8500_codec_cr52_sldai2toslado2 cr52_sldai2toslado2;
	t_ab8500_codec_cr51_to_cr56_sltoda cr52_sltoda2;

	/* CR53  */
	t_ab8500_codec_cr53_da34_voice cr53_da34_voice;
	t_ab8500_codec_cr53_sldai3toslado3 cr53_sldai3toslado3;
	t_ab8500_codec_cr51_to_cr56_sltoda cr53_sltoda3;

	/* CR54  */
	t_ab8500_codec_cr54_sldai4toslado4 cr54_sldai4toslado4;
	t_ab8500_codec_cr51_to_cr56_sltoda cr54_sltoda4;

	/* CR55  */
	t_ab8500_codec_cr55_da56_voice cr55_da56_voice;
	t_ab8500_codec_cr55_sldai5toslado5 cr55_sldai5toslado5;
	t_ab8500_codec_cr51_to_cr56_sltoda cr55_sltoda5;

	/* CR56  */
	t_ab8500_codec_cr56_sldai6toslado7 cr56_sldai6toslado7;
	t_ab8500_codec_cr51_to_cr56_sltoda cr56_sltoda6;

	/* CR57  */
	t_ab8500_codec_cr57_bfifull_msk cr57_bfifull_msk;
	t_ab8500_codec_cr57_bfiempt_msk cr57_bfiempt_msk;
	t_ab8500_codec_cr57_dachan_msk cr57_dachan_msk;
	t_ab8500_codec_cr57_gain_msk cr57_gain_msk;
	t_ab8500_codec_cr57_dspad_msk cr57_dspad_msk;
	t_ab8500_codec_cr57_dspda_msk cr57_dspda_msk;
	t_ab8500_codec_cr57_stfir_msk cr57_stfir_msk;

	/* CR58  */
	t_ab8500_codec_cr58_bfifull_ev cr58_bfifull_ev;
	t_ab8500_codec_cr58_bfiempt_ev cr58_bfiempt_ev;
	t_ab8500_codec_cr58_dachan_ev cr58_dachan_ev;
	t_ab8500_codec_cr58_gain_ev cr58_gain_ev;
	t_ab8500_codec_cr58_dspad_ev cr58_dspad_ev;
	t_ab8500_codec_cr58_dspda_ev cr58_dspda_ev;
	t_ab8500_codec_cr58_stfir_ev cr58_stfir_ev;

	/* CR59  */
	t_ab8500_codec_cr59_vssready_msk cr59_vssready_msk;
	t_ab8500_codec_cr59_shrtvibl_msk cr59_shrtvibl_msk;
	t_ab8500_codec_cr59_shrtvibr_msk cr59_shrtvibr_msk;
	t_ab8500_codec_cr59_shrthfl_msk cr59_shrthfl_msk;
	t_ab8500_codec_cr59_shrthfr_msk cr59_shrthfr_msk;
	t_ab8500_codec_cr59_shrthsl_msk cr59_shrthsl_msk;
	t_ab8500_codec_cr59_shrthsr_msk cr59_shrthsr_msk;
	t_ab8500_codec_cr59_shrtear_msk cr59_shrtear_msk;

	/* CR60  */
	t_ab8500_codec_cr60_vssready_ev cr60_vssready_ev;
	t_ab8500_codec_cr60_shrtvibl_ev cr60_shrtvibl_ev;
	t_ab8500_codec_cr60_shrtvibr_ev cr60_shrtvibr_ev;
	t_ab8500_codec_cr60_shrthfl_ev cr60_shrthfl_ev;
	t_ab8500_codec_cr60_shrthfr_ev cr60_shrthfr_ev;
	t_ab8500_codec_cr60_shrthsl_ev cr60_shrthsl_ev;
	t_ab8500_codec_cr60_shrthsr_ev cr60_shrthsr_ev;
	t_ab8500_codec_cr60_shrtear_ev cr60_shrtear_ev;

	/* CR61  */
	t_ab8500_codec_cr61_revision cr61_revision;
	t_ab8500_codec_cr61_fade_speed cr61_fade_speed;

	/* CR62  */
	t_ab8500_codec_cr62_dmic1sinc3 cr62_dmic1sinc3;
	t_ab8500_codec_cr62_dmic2sinc3 cr62_dmic2sinc3;
	t_ab8500_codec_cr62_dmic3sinc3 cr62_dmic3sinc3;
	t_ab8500_codec_cr62_dmic4sinc3 cr62_dmic4sinc3;
	t_ab8500_codec_cr62_dmic5sinc3 cr62_dmic5sinc3;
	t_ab8500_codec_cr62_dmic6sinc3 cr62_dmic6sinc3;

	/* CR63  */
	t_ab8500_codec_cr63_datohslen cr63_datohslen;
	t_ab8500_codec_cr63_datohsren cr63_datohsren;
	t_ab8500_codec_cr63_ad1sel cr63_ad1sel;
	t_ab8500_codec_cr63_ad2sel cr63_ad2sel;
	t_ab8500_codec_cr63_ad3sel cr63_ad3sel;
	t_ab8500_codec_cr63_ad5sel cr63_ad5sel;
	t_ab8500_codec_cr63_ad6sel cr63_ad6sel;
	t_ab8500_codec_cr63_ancsel cr63_ancsel;

	/* CR64  */
	t_ab8500_codec_cr64_datohfren cr64_datohfren;
	t_ab8500_codec_cr64_datohflen cr64_datohflen;
	t_ab8500_codec_cr64_hfrsel cr64_hfrsel;
	t_ab8500_codec_cr64_hflsel cr64_hflsel;
	t_ab8500_codec_cr64_stfir1sel cr64_stfir1sel;
	t_ab8500_codec_cr64_stfir2sel cr64_stfir2sel;

	/* CR65  */
	t_ab8500_codec_cr65_fadedis_ad1 cr65_fadedis_ad1;
	t_ab8500_codec_cr65_ad1gain cr65_ad1gain;

	/* CR66  */
	t_ab8500_codec_cr66_fadedis_ad2 cr66_fadedis_ad2;
	t_ab8500_codec_cr66_ad2gain cr66_ad2gain;

	/* CR67  */
	t_ab8500_codec_cr67_fadedis_ad3 cr67_fadedis_ad3;
	t_ab8500_codec_cr67_ad3gain cr67_ad3gain;

	/* CR68  */
	t_ab8500_codec_cr68_fadedis_ad4 cr68_fadedis_ad4;
	t_ab8500_codec_cr68_ad4gain cr68_ad4gain;

	/* CR69  */
	t_ab8500_codec_cr69_fadedis_ad5 cr69_fadedis_ad5;
	t_ab8500_codec_cr69_ad5gain cr69_ad5gain;

	/* CR70  */
	t_ab8500_codec_cr70_fadedis_ad6 cr70_fadedis_ad6;
	t_ab8500_codec_cr70_ad6gain cr70_ad6gain;

	/* CR71  */
	t_ab8500_codec_cr71_fadedis_da1 cr71_fadedis_da1;
	t_ab8500_codec_cr71_da1gain cr71_da1gain;

	/* CR72  */
	t_ab8500_codec_cr72_fadedis_da2 cr72_fadedis_da2;
	t_ab8500_codec_cr72_da2gain cr72_da2gain;

	/* CR73  */
	t_ab8500_codec_cr73_fadedis_da3 cr73_fadedis_da3;
	t_ab8500_codec_cr73_da3gain cr73_da3gain;

	/* CR74  */
	t_ab8500_codec_cr74_fadedis_da4 cr74_fadedis_da4;
	t_ab8500_codec_cr74_da4gain cr74_da4gain;

	/* CR75  */
	t_ab8500_codec_cr75_fadedis_da5 cr75_fadedis_da5;
	t_ab8500_codec_cr75_da5gain cr75_da5gain;

	/* CR76  */
	t_ab8500_codec_cr76_fadedis_da6 cr76_fadedis_da6;
	t_ab8500_codec_cr76_da6gain cr76_da6gain;

	/* CR77  */
	t_ab8500_codec_cr77_fadedis_ad1l cr77_fadedis_ad1l;
	t_ab8500_codec_cr77_ad1lbgain_to_hfl cr77_ad1lbgain_to_hfl;

	/* CR78  */
	t_ab8500_codec_cr78_fadedis_ad2l cr78_fadedis_ad2l;
	t_ab8500_codec_cr78_ad2lbgain_to_hfr cr78_ad2lbgain_to_hfr;

	/* CR79  */
	t_ab8500_codec_cr79_hssinc1 cr79_hssinc1;
	t_ab8500_codec_cr79_fadedis_hsl cr79_fadedis_hsl;
	t_ab8500_codec_cr79_hsldgain cr79_hsldgain;

	/* CR80  */
	t_ab8500_codec_cr80_fadedis_hsr cr80_fadedis_hsr;
	t_ab8500_codec_cr80_hsrdgain cr80_hsrdgain;

	/* CR81  */
	t_ab8500_codec_cr81_stfir1gain cr81_stfir1gain;

	/* CR82  */
	t_ab8500_codec_cr82_stfir2gain cr82_stfir2gain;

	/* CR83  */
	t_ab8500_codec_cr83_enanc cr83_enanc;
	t_ab8500_codec_cr83_anciirinit cr83_anciirinit;
	t_ab8500_codec_cr83_ancfirupdate cr83_ancfirupdate;

	/* CR84  */
	t_ab8500_codec_cr84_ancinshift cr84_ancinshift;

	/* CR85  */
	t_ab8500_codec_cr85_ancfiroutshift cr85_ancfiroutshift;

	/* CR86  */
	t_ab8500_codec_cr86_ancshiftout cr86_ancshiftout;

	/* CR87  */
	t_ab8500_codec_cr87_ancfircoeff_msb cr87_ancfircoeff_msb;

	/* CR88  */
	t_ab8500_codec_cr88_ancfircoeff_lsb cr88_ancfircoeff_lsb;

	/* CR89  */
	t_ab8500_codec_cr89_anciircoeff_msb cr89_anciircoeff_msb;

	/* CR90  */
	t_ab8500_codec_cr90_anciircoeff_lsb cr90_anciircoeff_lsb;

	/* CR91  */
	t_ab8500_codec_cr91_ancwarpdel_msb cr91_ancwarpdel_msb;

	/* CR92  */
	t_ab8500_codec_cr92_ancwarpdel_lsb cr92_ancwarpdel_lsb;

	/* CR93  */
	t_ab8500_codec_cr93_ancfirpeak_msb cr93_ancfirpeak_msb;

	/* CR94  */
	t_ab8500_codec_cr94_ancfirpeak_lsb cr94_ancfirpeak_lsb;

	/* CR95  */
	t_ab8500_codec_cr95_anciirpeak_msb cr95_anciirpeak_msb;

	/* CR96  */
	t_ab8500_codec_cr96_anciirpeak_lsb cr96_anciirpeak_lsb;

	/* CR97  */
	t_ab8500_codec_cr97_stfir_set cr97_stfir_set;
	t_ab8500_codec_cr97_stfir_addr cr97_stfir_addr;

	/* CR98  */
	t_ab8500_codec_cr98_stfir_coeff_msb cr98_stfir_coeff_msb;

	/* CR99  */
	t_ab8500_codec_cr99_stfir_coeff_lsb cr99_stfir_coeff_lsb;

	/* CR100  */
	t_ab8500_codec_cr100_enstfirs cr100_enstfirs;
	t_ab8500_codec_cr100_stfirstoif1 cr100_stfirstoif1;
	t_ab8500_codec_cr100_stfir_busy cr100_stfir_busy;

	/* CR101  */
	t_ab8500_codec_cr101_parlhf cr101_parlhf;
	t_ab8500_codec_cr101_parlvib cr101_parlvib;
	t_ab8500_codec_cr101_classd_viblswapen cr101_classd_viblswapen;
	t_ab8500_codec_cr101_classd_vibrswapen cr101_classd_vibrswapen;
	t_ab8500_codec_cr101_classd_hflswapen cr101_classd_hflswapen;
	t_ab8500_codec_cr101_classd_hfrswapen cr101_classd_hfrswapen;

	/* CR102  */
	t_ab8500_codec_cr102_classd_firbyp cr102_classd_firbyp;
	t_ab8500_codec_cr102_classd_highvolen cr102_classd_highvolen;

	/* CR103  */
	t_ab8500_codec_cr103_classd_ditherhpgain cr103_classd_ditherhpgain;
	t_ab8500_codec_cr103_classd_ditherwgain cr103_classd_ditherwgain;

	/* CR104  */
	t_ab8500_codec_cr104_bfifoint cr104_bfifoint;

	/* CR105  */
	t_ab8500_codec_cr105_bfifotx cr105_bfifotx;

	/* CR106  */
	t_ab8500_codec_cr106_bfifofsext cr106_bfifofsext;
	t_ab8500_codec_cr106_bfifomsk cr106_bfifomsk;
	t_ab8500_codec_cr106_bfifomstr cr106_bfifomstr;
	t_ab8500_codec_cr106_bfifostrt cr106_bfifostrt;

	/* CR107  */
	t_ab8500_codec_cr107_bfifosampnr cr107_bfifosampnr;

	/* CR108  */
	t_ab8500_codec_cr108_bfifowakeup cr108_bfifowakeup;

	/* CR109  */
	t_ab8500_codec_cr109_bfifosamples cr109_bfifosamples;

} t_ab8500_codec_configuration;

typedef enum {
	AB8500_CODEC_DIRECTION_IN,
	AB8500_CODEC_DIRECTION_OUT,
	AB8500_CODEC_DIRECTION_INOUT
} t_ab8500_codec_direction;

typedef enum {
	AB8500_CODEC_MODE_HIFI,
	AB8500_CODEC_MODE_VOICE,
	AB8500_CODEC_MODE_MANUAL_SETTING
} t_ab8500_codec_mode;

typedef enum {
	AB8500_CODEC_AUDIO_INTERFACE_0,
	AB8500_CODEC_AUDIO_INTERFACE_1
} t_ab8500_codec_audio_interface;

typedef enum {
	AB8500_CODEC_SRC_LINEIN,
	AB8500_CODEC_SRC_MICROPHONE_1A,
	AB8500_CODEC_SRC_MICROPHONE_1B,
	AB8500_CODEC_SRC_MICROPHONE_2,
	AB8500_CODEC_SRC_D_MICROPHONE_1,
	AB8500_CODEC_SRC_D_MICROPHONE_2,
	AB8500_CODEC_SRC_D_MICROPHONE_3,
	AB8500_CODEC_SRC_D_MICROPHONE_4,
	AB8500_CODEC_SRC_D_MICROPHONE_5,
	AB8500_CODEC_SRC_D_MICROPHONE_6,
	AB8500_CODEC_SRC_FM_RX,
	AB8500_CODEC_SRC_ALL
} t_ab8500_codec_src;

typedef enum {
	AB8500_CODEC_DEST_HEADSET,
	AB8500_CODEC_DEST_EARPIECE,
	AB8500_CODEC_DEST_HANDSFREE,
	AB8500_CODEC_DEST_VIBRATOR_L,
	AB8500_CODEC_DEST_VIBRATOR_R,
	AB8500_CODEC_DEST_ALL
} t_ab8500_codec_dest;

typedef struct {
	t_uint8 slave_address_of_ab8500_codec;
	t_ab8500_codec_direction ab8500_codec_direction;
	t_ab8500_codec_mode ab8500_codec_mode_in;
	t_ab8500_codec_mode ab8500_codec_mode_out;
	t_ab8500_codec_audio_interface audio_interface;
	t_ab8500_codec_src ab8500_codec_src;
	t_ab8500_codec_dest ab8500_codec_dest;
	t_uint8 in_left_volume;
	t_uint8 in_right_volume;
	t_uint8 out_left_volume;
	t_uint8 out_right_volume;

	t_ab8500_codec_configuration ab8500_codec_configuration;
} t_ab8500_codec_system_context;
#endif /* _AB8500_CODECP_H_ */

/* End of file AB8500_CODECP.h */