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Diffstat (limited to 'adreno_gen7.c')
-rw-r--r--adreno_gen7.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/adreno_gen7.c b/adreno_gen7.c
index 05dad87..14cba26 100644
--- a/adreno_gen7.c
+++ b/adreno_gen7.c
@@ -47,6 +47,7 @@ static const u32 gen7_ifpc_pwrup_reglist[] = {
GEN7_SP_NC_MODE_CNTL,
GEN7_CP_DBG_ECO_CNTL,
GEN7_CP_PROTECT_CNTL,
+ GEN7_CP_LPAC_PROTECT_CNTL,
GEN7_CP_PROTECT_REG,
GEN7_CP_PROTECT_REG+1,
GEN7_CP_PROTECT_REG+2,
@@ -282,6 +283,7 @@ void gen7_get_gpu_feature_info(struct adreno_device *adreno_dev)
adreno_dev->feature_fuse = feature_fuse;
}
+#define GEN7_PROTECT_DEFAULT (BIT(0) | BIT(1) | BIT(3))
static void gen7_protect_init(struct adreno_device *adreno_dev)
{
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -294,8 +296,10 @@ static void gen7_protect_init(struct adreno_device *adreno_dev)
* protect violation and select the last span to protect from the start
* address all the way to the end of the register address space
*/
- kgsl_regwrite(device, GEN7_CP_PROTECT_CNTL,
- BIT(0) | BIT(1) | BIT(3));
+ kgsl_regwrite(device, GEN7_CP_PROTECT_CNTL, GEN7_PROTECT_DEFAULT);
+
+ if (adreno_dev->lpac_enabled)
+ kgsl_regwrite(device, GEN7_CP_LPAC_PROTECT_CNTL, GEN7_PROTECT_DEFAULT);
/* Program each register defined by the core definition */
for (i = 0; regs[i].reg; i++) {