diff options
-rw-r--r-- | msm/dp/dp_catalog.c | 8 | ||||
-rw-r--r-- | msm/dsi/dsi_drm.c | 3 |
2 files changed, 9 insertions, 2 deletions
diff --git a/msm/dp/dp_catalog.c b/msm/dp/dp_catalog.c index f67302bb..de64dc2c 100644 --- a/msm/dp/dp_catalog.c +++ b/msm/dp/dp_catalog.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. */ @@ -986,7 +987,12 @@ static void dp_catalog_ctrl_config_ctrl(struct dp_catalog_ctrl *ctrl, u8 ln_cnt) io_data = catalog->io.dp_link; cfg = dp_read(DP_CONFIGURATION_CTRL); - cfg &= ~(BIT(4) | BIT(5)); + /* + * Reset ASSR (alternate scrambler seed reset) by resetting BIT(10). + * ASSR should be set to disable for TPS4 link training pattern. + * Forcing it to 0 as the power on reset value of register enables it. + */ + cfg &= ~(BIT(4) | BIT(5) | BIT(10)); cfg |= (ln_cnt - 1) << 4; dp_write(DP_CONFIGURATION_CTRL, cfg); diff --git a/msm/dsi/dsi_drm.c b/msm/dsi/dsi_drm.c index 9ea51375..f1f14a5d 100644 --- a/msm/dsi/dsi_drm.c +++ b/msm/dsi/dsi_drm.c @@ -180,7 +180,8 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) return; } - atomic_set(&c_bridge->display->panel->esd_recovery_pending, 0); + if (bridge->encoder->crtc->state->active_changed) + atomic_set(&c_bridge->display->panel->esd_recovery_pending, 0); /* By this point mode should have been validated through mode_fixup */ rc = dsi_display_set_mode(c_bridge->display, |