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| author | Praneeth Bajjuri <praneeth@ti.com> | 2017-08-28 18:03:19 -0500 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2017-08-28 18:03:19 -0500 |
| commit | dda8acaf6f2d9bddce62c305edf6b3071f04c136 (patch) | |
| tree | 612f8b7b18ff3a84184ddc0ce456b9b0287cace6 /include/soc/at91/at91sam9_ddrsdr.h | |
| parent | b22bbe0c5fa4fd5eb4609108a750b28a744a643e (diff) | |
| parent | eabbcea7629d5f2ec91568f7bd104536614107db (diff) | |
| download | jacinto6evm-6AM.1.3-rvc-video.tar.gz | |
Merge branch 'p-ti-lsk-android-linux-4.4.y' of git://git.omapzoom.org/kernel/omap into 6AM.1.3-rvc-video6AM.1.3-rvc-video
* 'p-ti-lsk-android-linux-4.4.y' of git://git.omapzoom.org/kernel/omap: (2048 commits)
ARM: dts: dra7: Remove deprecated PCI compatible string
ARM: dts: dra76-evm: Enable x2 PCIe lanes
ARM: dts: DRA72x: Use PCIe compatible specific to dra72
ARM: dts: DRA74x: Use PCIe compatible specific to dra74
ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
PCI: dwc: pci-dra7xx: Enable x2 mode support
PCI: dwc: dra7xx: Add support for SoC specific compatible strings
dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7
dt-bindings: PCI: dra7xx: Add SoC specific compatible strings
ARM: dts: dra7-evm: Move pcie RC node to common file
ARM: dts: dra76-evm: add higher speed MMC/SD modes
Linux 4.4.84
usb: qmi_wwan: add D-Link DWM-222 device ID
usb: optimize acpi companion search for usb port devices
perf/x86: Fix LBR related crashes on Intel Atom
pids: make task_tgid_nr_ns() safe
Sanitize 'move_pages()' permission checks
irqchip/atmel-aic: Fix unbalanced refcount in aic_common_rtc_irq_fixup()
irqchip/atmel-aic: Fix unbalanced of_node_put() in aic_common_irq_fixup()
x86/asm/64: Clear AC on NMI entries
...
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Conflicts:
arch/arm/boot/dts/Makefile
drivers/gpu/drm/omapdrm/dss/dispc.c
Diffstat (limited to 'include/soc/at91/at91sam9_ddrsdr.h')
| -rw-r--r-- | include/soc/at91/at91sam9_ddrsdr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h index dc10c52e0e91..393362bdb860 100644 --- a/include/soc/at91/at91sam9_ddrsdr.h +++ b/include/soc/at91/at91sam9_ddrsdr.h @@ -81,6 +81,7 @@ #define AT91_DDRSDRC_LPCB_POWER_DOWN 2 #define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3 #define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */ +#define AT91_DDRSDRC_LPDDR2_PWOFF (1 << 3) /* LPDDR Power Off */ #define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */ #define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ #define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */ @@ -96,7 +97,9 @@ #define AT91_DDRSDRC_MD_SDR 0 #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 +#define AT91_DDRSDRC_MD_LPDDR3 5 #define AT91_DDRSDRC_MD_DDR2 6 /* [SAM9 Only] */ +#define AT91_DDRSDRC_MD_LPDDR2 7 #define AT91_DDRSDRC_DBW (1 << 4) /* Data Bus Width */ #define AT91_DDRSDRC_DBW_32BITS (0 << 4) #define AT91_DDRSDRC_DBW_16BITS (1 << 4) |