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authorClement Calmels <clement.calmels@qorvo.com>2022-06-16 16:36:17 +0200
committerVictor Liu <victorliu@google.com>2023-09-22 18:21:36 +0000
commit15ae8e741f7cc67763ac51f72464f6458a1177fa (patch)
tree89ee50561dedb85829181eedeb90fbdbf66fdd1e
parent9c9c4b9204c5cf9df7394d437540a6d9e0946710 (diff)
downloaduwb-android-gs-shusky-5.15-android14-qpr1-beta.tar.gz
Features: * Add power management operations to stop HSSPI on suspend and start HSSPI on resume * Set SS_IRQ as a wake-up interrupt Bug: 299103117 Change-Id: I869388cf4b4d53b0365e7c180bafe512b9983ad1 Signed-off-by: Clement Calmels <clement.calmels@qorvo.com> Signed-off-by: Habib Bel Haj Ali <habib.belhajali@qorvo.com>
-rw-r--r--qm35-spi.c36
-rw-r--r--qm35.h5
2 files changed, 39 insertions, 2 deletions
diff --git a/qm35-spi.c b/qm35-spi.c
index d969e2d..054518f 100644
--- a/qm35-spi.c
+++ b/qm35-spi.c
@@ -94,6 +94,11 @@ static bool wake_use_csn = false;
module_param(wake_use_csn, bool, 0444);
MODULE_PARM_DESC(wake_use_csn, "Use HSSPI CSn pin to wake up QM35");
+static bool wake_on_ssirq = true;
+module_param(wake_on_ssirq, bool, 0644);
+MODULE_PARM_DESC(wake_on_ssirq,
+ "Allow QM35 to wakeup the platform using ss_irq");
+
int trace_spi_xfers;
module_param(trace_spi_xfers, int, 0444);
MODULE_PARM_DESC(trace_spi_xfers, "Trace all the SPI transfers");
@@ -592,6 +597,13 @@ static int hsspi_irqs_setup(struct qm35_ctx *qm35_ctx)
ss_irqflags = irq_get_trigger_type(qm35_ctx->spi->irq);
}
+ if (wake_on_ssirq) {
+ ret = enable_irq_wake(qm35_ctx->spi->irq);
+ if (ret) {
+ return ret;
+ }
+ }
+
qm35_ctx->hsspi.odw_cleared = reenable_ss_irq;
qm35_ctx->hsspi.wakeup = qm35_wakeup;
qm35_ctx->hsspi.reset_qm35 = qm35_reset_hook;
@@ -895,10 +907,34 @@ static int qm35_remove(struct spi_device *spi)
return 0;
}
+#ifdef CONFIG_PM_SLEEP
+static int qm35_pm_suspend(struct device *dev)
+{
+ struct qm35_ctx *qm35_hdl = dev_get_drvdata(dev);
+
+ qm35_hsspi_stop(qm35_hdl);
+
+ return 0;
+}
+
+static int qm35_pm_resume(struct device *dev)
+{
+ struct qm35_ctx *qm35_hdl = dev_get_drvdata(dev);
+
+ qm35_hsspi_start(qm35_hdl);
+
+ return 0;
+}
+#endif /* CONFIG_PM_SLEEP */
+
+static SIMPLE_DEV_PM_OPS(qm35_spi_ops, qm35_pm_suspend, qm35_pm_resume);
+#define pm_sleep_ptr(_ptr) (IS_ENABLED(CONFIG_PM_SLEEP) ? (_ptr) : NULL)
+
static struct spi_driver qm35_spi_driver = {
.driver = {
.name = "qm35",
.of_match_table = of_match_ptr(qm35_dt_ids),
+ .pm = pm_sleep_ptr(&qm35_spi_ops),
},
.probe = qm35_probe,
.remove = qm35_remove,
diff --git a/qm35.h b/qm35.h
index 6f967e7..59cf825 100644
--- a/qm35.h
+++ b/qm35.h
@@ -24,7 +24,7 @@
#define QM_BOOT_MS 450
#define QM_BEFORE_RESET_MS 450
-#define DRV_VERSION "6.3.6-rc1"
+#define DRV_VERSION "6.3.8-rc1"
struct regulator;
@@ -73,7 +73,8 @@ static inline void qm35_set_state(struct qm35_ctx *qm35_hdl, int state)
spin_unlock_irqrestore(&qm35_hdl->lock, flags);
}
-static inline int qm35_reset(struct qm35_ctx *qm35_hdl, int timeout_ms, bool run)
+static inline int qm35_reset(struct qm35_ctx *qm35_hdl, int timeout_ms,
+ bool run)
{
if (qm35_hdl->gpio_reset) {
qm35_set_state(qm35_hdl, QM35_CTRL_STATE_RESET);