diff options
Diffstat (limited to 'mali_kbase/mali_kbase_config_defaults.h')
| -rw-r--r-- | mali_kbase/mali_kbase_config_defaults.h | 90 |
1 files changed, 78 insertions, 12 deletions
diff --git a/mali_kbase/mali_kbase_config_defaults.h b/mali_kbase/mali_kbase_config_defaults.h index 18e40b5..fa73612 100644 --- a/mali_kbase/mali_kbase_config_defaults.h +++ b/mali_kbase/mali_kbase_config_defaults.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * - * (C) COPYRIGHT 2013-2022 ARM Limited. All rights reserved. + * (C) COPYRIGHT 2013-2023 ARM Limited. All rights reserved. * * This program is free software and is provided to you under the terms of the * GNU General Public License version 2 as published by the Free Software @@ -89,6 +89,18 @@ enum { KBASE_3BIT_AID_4 = 0x7 }; +#if MALI_USE_CSF +/* + * Default value for the TIMER register of the IPA Control interface, + * expressed in milliseconds. + * + * The chosen value is a trade off between two requirements: the IPA Control + * interface should sample counters with a resolution in the order of + * milliseconds, while keeping GPU overhead as limited as possible. + */ +#define IPA_CONTROL_TIMER_DEFAULT_VALUE_MS ((u32)10) /* 10 milliseconds */ +#endif /* MALI_USE_CSF */ + /* Default period for DVFS sampling (can be overridden by platform header) */ #ifndef DEFAULT_PM_DVFS_PERIOD #define DEFAULT_PM_DVFS_PERIOD 100 /* 100ms */ @@ -158,11 +170,6 @@ enum { */ #define DEFAULT_JS_RESET_TICKS_DUMPING (15020) /* 1502s */ -/* Default number of milliseconds given for other jobs on the GPU to be - * soft-stopped when the GPU needs to be reset. - */ -#define DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */ - /* Nominal reference frequency that was used to obtain all following * <...>_TIMEOUT_CYCLES macros, in kHz. * @@ -176,11 +183,12 @@ enum { * * This is also the default timeout to be used when an invalid timeout * selector is used to retrieve the timeout on CSF GPUs. + * This shouldn't be used as a timeout for the CSG suspend request. * * Based on 75000ms timeout at nominal 100MHz, as is required for Android - based * on scaling from a 50MHz GPU system. */ -#define CSF_FIRMWARE_TIMEOUT_CYCLES (7500000000) +#define CSF_FIRMWARE_TIMEOUT_CYCLES (7500000000ull) /* Timeout in clock cycles for GPU Power Management to reach the desired * Shader, L2 and MCU state. @@ -189,11 +197,41 @@ enum { */ #define CSF_PM_TIMEOUT_CYCLES (250000000) -/* Waiting timeout in clock cycles for GPU reset to complete. +/* Waiting timeout in clock cycles for a CSG to be suspended. + * + * Based on 30s timeout at 100MHz, scaled from 5s at 600Mhz GPU frequency. + * More cycles (1s @ 100Mhz = 100000000) are added up to ensure that + * host timeout is always bigger than FW timeout. + */ +#define CSF_CSG_SUSPEND_TIMEOUT_CYCLES (3100000000ull) + +/* Waiting timeout in clock cycles for GPU reset to complete. */ +#define CSF_GPU_RESET_TIMEOUT_CYCLES (CSF_CSG_SUSPEND_TIMEOUT_CYCLES * 2) + +/* Waiting timeout in clock cycles for GPU firmware to boot. + * + * Based on 250ms timeout at 100MHz, scaled from a 50MHz GPU system. + */ +#define CSF_FIRMWARE_BOOT_TIMEOUT_CYCLES (25000000) + +/* Waiting timeout for a ping request to be acknowledged, in clock cycles. + * + * Based on 6000ms timeout at 100MHz, scaled from a 50MHz GPU system. + */ +#define CSF_FIRMWARE_PING_TIMEOUT_CYCLES (600000000ull) + +/* Waiting timeout for a KCPU queue's fence signal blocked to long, in clock cycles. * - * Based on 2500ms timeout at 100MHz, scaled from a 50MHz GPU system. + * Based on 10s timeout at 100MHz, scaled from a 50MHz GPU system. */ -#define CSF_GPU_RESET_TIMEOUT_CYCLES (250000000) +#define KCPU_FENCE_SIGNAL_TIMEOUT_CYCLES (1000000000ull) + +/* Waiting timeout for task execution on an endpoint. Based on the + * DEFAULT_PROGRESS_TIMEOUT. + * + * Based on 25s timeout at 100Mhz, scaled from a 500MHz GPU system. + */ +#define DEFAULT_PROGRESS_TIMEOUT_CYCLES (2500000000ull) #else /* MALI_USE_CSF */ @@ -202,7 +240,22 @@ enum { */ #define JM_DEFAULT_TIMEOUT_CYCLES (150000000) -#endif /* MALI_USE_CSF */ +/* Default number of milliseconds given for other jobs on the GPU to be + * soft-stopped when the GPU needs to be reset. + */ +#define JM_DEFAULT_RESET_TIMEOUT_MS (3000) /* 3s */ + +/* Default timeout in clock cycles to be used when checking if JS_COMMAND_NEXT + * is updated on HW side so a Job Slot is considered free. + * This timeout will only take effect on GPUs with low value for the minimum + * GPU clock frequency (<= 100MHz). + * + * Based on 1ms timeout at 100MHz. Will default to 0ms on GPUs with higher + * value for minimum GPU clock frequency. + */ +#define JM_DEFAULT_JS_FREE_TIMEOUT_CYCLES (100000) + +#endif /* !MALI_USE_CSF */ /* Default timeslice that a context is scheduled in for, in nanoseconds. * @@ -238,5 +291,18 @@ enum { */ #define DEFAULT_IR_THRESHOLD (192) -#endif /* _KBASE_CONFIG_DEFAULTS_H_ */ +/* Waiting time in clock cycles for the completion of a MMU operation. + * + * Ideally 1.6M GPU cycles required for the L2 cache (512KiB slice) flush. + * + * As a pessimistic value, 50M GPU cycles ( > 30 times bigger ) is chosen. + * It corresponds to 0.5s in GPU @ 100Mhz. + */ +#define MMU_AS_INACTIVE_WAIT_TIMEOUT_CYCLES ((u64)50 * 1024 * 1024) + +#if IS_ENABLED(CONFIG_MALI_TRACE_POWER_GPU_WORK_PERIOD) +/* Default value of the time interval at which GPU metrics tracepoints are emitted. */ +#define DEFAULT_GPU_METRICS_TP_EMIT_INTERVAL_NS (500000000u) /* 500 ms */ +#endif +#endif /* _KBASE_CONFIG_DEFAULTS_H_ */ |