diff options
author | zhengxing <zhengxing@rock-chips.com> | 2015-12-23 17:19:50 +0800 |
---|---|---|
committer | Kees Cook <keescook@chromium.org> | 2016-01-11 15:16:35 -0800 |
commit | 659692874d00a2d31f6fef5905770c4f50da4659 (patch) | |
tree | 8cd115cf4396e0b39cb1cd5b5d964cc9cdbc508d | |
parent | ee40783d81650ba40ecb8be1498ac34586a7e962 (diff) | |
download | v4.1-659692874d00a2d31f6fef5905770c4f50da4659.tar.gz |
FROMLIST: ARM: dts: rockchip: Add support emac for RK3036
This patch describe the emac, and we need to let mac clock under
the APLL which is able to provide the accurate 50MHz what mac_ref
need.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Bug: 25923642
Patchset: support emac dts patch.
(am https://patchwork.kernel.org/patch/7981761/)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Iff5fa4d5e80f35aad5e2835e4df90da64ac255f0
-rw-r--r-- | arch/arm/boot/dts/rk3036-evb.dts | 23 | ||||
-rw-r--r-- | arch/arm/boot/dts/rk3036-kylin.dts | 22 | ||||
-rw-r--r-- | arch/arm/boot/dts/rk3036.dtsi | 32 |
3 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 8483e363d09..eed88b85b30 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,17 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; @@ -66,3 +77,15 @@ &uart2 { status = "okay"; }; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +}; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 602daf8db55..6629a011d38 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -108,6 +108,17 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; @@ -374,6 +385,17 @@ }; &pinctrl { + + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + pmic { pmic_int: pmic-int { rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 6ce47fcd2cc..6f7519cada4 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -257,6 +257,20 @@ status = "disabled"; }; + emac: ethernet@10200000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc@10214000 { compatible = "rockchip,rk3288-dw-mshc"; clock-frequency = <37500000>; @@ -678,6 +692,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_none>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_none>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_none>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_none>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_none>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_none>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_none>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_none>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_none>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_none>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, |