diff options
| author | Lin Huang <hl@rock-chips.com> | 2018-07-03 09:13:50 +0800 |
|---|---|---|
| committer | Amit Uttamchandani <amituttam@google.com> | 2018-07-02 21:18:15 -0700 |
| commit | 31e4afd1438ffcdf076ed59d6ec34201d61a6bdc (patch) | |
| tree | feff808dc600aaae9305dc2292a67a87f8635e6c | |
| parent | 8b23ef63c65800205a60732e554d3ab25bb875ac (diff) | |
| download | rk-u-boot-31e4afd1438ffcdf076ed59d6ec34201d61a6bdc.tar.gz | |
gva_rk3229: set cpu frequency to 1.4GHz
Check with IC team, rk3229 cpu core voltage better lower than
1.4V, so set it to 1.35V, with that, we better to set cpu frquency
to 1.4GHz.
Change-Id: Icdfe695129cb30d89d99dd702ad5ab629c809f30
Signed-off-by: Lin Huang <hl@rock-chips.com>
| -rw-r--r-- | board/rockchip/gva_rk3229/gva_rk3229.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/rockchip/gva_rk3229/gva_rk3229.c b/board/rockchip/gva_rk3229/gva_rk3229.c index 3db09b97a1..4d53a53a09 100644 --- a/board/rockchip/gva_rk3229/gva_rk3229.c +++ b/board/rockchip/gva_rk3229/gva_rk3229.c @@ -120,9 +120,9 @@ int board_early_init_r(void) return ret; } - /* set RK805 BUCK1 to 1.4V */ + /* set RK805 BUCK1 to 1.35V */ pmic_read(pmic, 0x2f, &buck1_on_vsel_val, 1); - buck1_on_vsel_val = (buck1_on_vsel_val & 0xc0) | 0x3a; + buck1_on_vsel_val = (buck1_on_vsel_val & 0xc0) | 0x33; pmic_write(pmic, 0x2f, &buck1_on_vsel_val, 1); udelay(100);/* Must wait for voltage to stabilize */ @@ -132,9 +132,9 @@ int board_early_init_r(void) return ret; } - /* set arm clock to 1.46GHz */ + /* set arm clock to 1.4GHz */ clk.id = CLK_ARM; - ret = clk_set_rate(&clk, 1464000000); + ret = clk_set_rate(&clk, 1392000000); if (IS_ERR_VALUE(ret)) { printf("%s, set CLK_ARM fail\n", __func__); return ret; |