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33 hoursMerge "Implement vssrl/vssra vv/vx/vi as intrinsics" into mainHEADmastermainHaines Sy
37 hoursImplement vssrl/vssra vv/vx/vi as intrinsicsHaines Sy
Test: m berberis_all Change-Id: Icee6b88d4c5a794c209a0f974be5d56cea951857
37 hoursMerge "Implement vsmul vx/vv as intrinsics" into mainHaines Sy
38 hoursImplement vsmul vx/vv as intrinsicsHaines Sy
Test: m berberis_all Change-Id: I29fb27ab1374376bbe915674e4c6bf950e404a96
6 days[interpreter/riscv64] Move viota to inline testsPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, program_runner inline_asm_tests Change-Id: Id50653eebeeeae8a309491e188c6a98b8ca6d613
6 days[interpreter/riscv64] Move vand,vor,vxor to inline testsPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, program_runner inline_asm_tests Change-Id: Id6bf2b58c53bdcaf4a1b2357977f831eb3162470
6 days[interpreter/riscv64] Move vid and vrsub to inline testsPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, program_runner inline_asm_tests Change-Id: Ibd4fa987128d090751826ce2e26bd28848550ecd
6 daysMerge "interpreter: BitMaskToSimdMask instead of BitMaskToSimdMaskForTests" ↵Victor Khimenko
into main
7 days[interpreter/riscv64] Move vsub tests to inline_asm_testsPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, progam_runner inline_asm_tests_riscv64 Change-Id: Id24987ad7680eab7bb19936037f82af105f4e014
7 days[interpreter/riscv64] Move vadd tests to inline_asm_testsPaul Daniel Faria
Note that I had to use t0 instead of x1 since x1 is ra. It was being overwritten by the jalr we use to call the test insns. Test: m inline_asm_tests_riscv64.native_bridge, progam_runner inline_asm_tests_riscv64 Change-Id: Ia60544ce2fad426e04115354f750da658151fec3
7 days[riscv64] Fix printing hex values in inline_asm_testsPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, program_runner inline_asm_tests Change-Id: I101e3791b285ab7f0e9543fe5fa1ebaf0077354d
7 daysinterpreter: BitMaskToSimdMask instead of BitMaskToSimdMaskForTestsVictor Khimenko
Test: m berberis_all Change-Id: Iddb62441aef572523c62a6c98e3ffd26a288e376
8 daysMerge "[interpreter/riscv64] Move vfcvt tests to inline asm" into mainTreehugger Robot
8 days[interpreter/riscv64] Move vfcvt tests to inline asmPaul Daniel Faria
Test: m inline_asm_tests_riscv64.native_bridge, program_runner inline_asm_tests_riscv64 Change-Id: I6eeb5ede7684ef934b5227b6068ec99537e1045d
8 daysbuild fix: declare all product artifactsLev Rumyantsev
Test: tree-hugger Bug: 342143077 Change-Id: I41991dda02274aa0137981ea2813d6aa468525fc
9 days21-05-24: Upstream changesLev Rumyantsev
Test: tree-hugger Bug: 232598137 Change-Id: If0a9b0e3ac91d1c3ba3f9b715bdc3cf9b30edc14
9 daysMerge "Implement vfw[n]m acc/sac as intrinsics" into mainHaines Sy
9 daysMerge "Clean up riscv64 instruction tests" into mainAkira Baruah
10 daysImplement vfw[n]m acc/sac as intrinsicsHaines Sy
Test: m berberis_all Change-Id: If682d92db51ca7c440930c30651b5bf6a8ee35a6
10 daysClean up riscv64 instruction testsAkira Baruah
Uses RunInstruction helper to collapse repeated boilerplate used in most test cases for riscv64 instruction tests. The reduced verbosity should improve readability without sacrificing semantic clarity. Bug: None Test: berberis_host_tests Change-Id: Ie090d1a20008adacd65a2ea0defd890df7028163
10 daysDo not canonicalize NaNs for sign-injection insnsAkira Baruah
According to the RISC-V spec v2.2: The sign-injection instructions (FSGNJ, FSGNJN, FSGNJX) do not canonicalize NaNs; they manipulate the underlying bit patterns directly. Semantics player previously canonicalized these instructions, resulting in incorrect NaN negation. Adds new unit tests for Fabs.{s,d} and Fneg.{s,d} negation with NaNs. These insns are variants of Fsgnjx.{s,d} and Fsgnjn.{s,d}, respectively. Bug: 330396676 Test: berberis_host_tests Test: bionic unit tests for *scanf_inf_nan Change-Id: Ifcba94d0ac1a348fe52bdd776d49aa0ff5cdc45e
13 daysMerge "Add more granular instruction tests for fflags" into mainTreehugger Robot
13 daysAdd more granular instruction tests for fflagsAkira Baruah
Splits out specific categories of instructions for modifying the fflags portion of the fcsr register. Enables easier detection of instruction-specific errors across the various translation modes. Tested by locally reverting aosp/3090389 and confirming that only the LiteTranslator instance of the FFlagsClearBits tests failed. Bug: 330396676 Test: berberis_host_tests Change-Id: Ie2ea461a1e4b584f1b88f0459f945668ada01f76
13 daysMerge "Add inline-asm-tests to berberis_run_host_tests" into mainTreehugger Robot
13 daysAdd inline-asm-tests to berberis_run_host_testsLev Rumyantsev
Test: berberis_run_host_tests Bug: 301577077 Change-Id: I02b43f75a7e043de5e224bce22d96c643878b55d
14 daysMerge "SplitLines: specify allocator for substring" into mainRyan Prichard
14 daysMerge changes I59ab0aa7,I43b669b0,I004a1367,Ia207f512,I844be7df into mainPaul Faria
* changes: inline_asm_tests: Use EXPECT_EQ for equality check interpreter/riscv64: Implement vfsqrt.v inline_asm_tests: Add setup for running single arg inline_asm_tests: Expand SIMD128 repr support [interpreter/riscv64] Canonicalize vector float results
14 daysinline_asm_tests: Use EXPECT_EQ for equality checkPaul Daniel Faria
Rather than EXPECT_TRUE(A == B), the former will log the values of the args to aid in debugging. Bug: 232598137 Test: berberis_program_runner_riscv64 inline_asm_test_riscv64 Change-Id: I59ab0aa7f53238485ee2d83e0764066fe9031801
14 daysinterpreter/riscv64: Implement vfsqrt.vPaul Daniel Faria
Test: m berberis_all berberis_run_host_tests, berberis_program_runner_riscv64 inline_asm_tests_riscv64 Change-Id: I43b669b0a6493bb5ce54896d4f5b2b538a45adb2
14 daysinline_asm_tests: Add setup for running single argPaul Daniel Faria
Adds TestVectorInstruction and RunOneArgOneRes functions. Test: berberis_program_runner_riscv64 inline_asm_tests_riscv64 Change-Id: I004a1367924d02ea89d5bf027c10436224f5824c
14 daysinline_asm_tests: Expand SIMD128 repr supportPaul Daniel Faria
Add constructors for groupings of uint8, uint16, and uint32, also add masking data and helpers for those sizes. Test: berberis_program_runner_riscv64 inline_asm_tests_riscv64 Change-Id: Ia207f512d15237d95bbfa142ef9f331adac9cf15
14 days[interpreter/riscv64] Canonicalize vector float resultsPaul Daniel Faria
Test: m berberis_all berberis_run_host_tests Change-Id: I844be7dfa836a346ecb449e234dcade4e30a4862
14 daysMerge "Implement Vfnm vv/vf instructions as intrinsics" into mainHaines Sy
14 daysMerge "lite-tr: Fix return value register for UpdateCsr" into mainTreehugger Robot
14 daysMerge "riscv64: Spill fp args into int regs" into mainJeremiah Griffin
2024-05-16lite-tr: Fix return value register for UpdateCsrAkira Baruah
Returns the temporary result register rather than the input arg register for the non-immediate variant of UpdateCsr. The immediate version of this function already returns the result register correctly. Fixes the following previously failing Bionic unit tests: - fenv.feclearexcept_fetestexcept - fenv.feraiseexcept - fenv.fegetenv_fesetenv - fenv.feholdexcept_feupdateenv - fenv.fedisableexcept_fegetexcept Bug: 330396676 Test: Bionic fenv.fegetenv_fesetenv Test: berberis_host_tests Change-Id: I7645cf123bcb44d53b2e3325140a44eb7d4f9839
2024-05-15SplitLines: specify allocator for substringRyan Prichard
The substr method doesn't accept an allocator parameter, but the basic_string constructor does. Previously, libc++ forwarded the base string's allocator, but this was non-conforming. Test: m libberberis_kernel_api_common Test: cd frameworks/libs/binary_translation; mm Bug: 333165689 Bug: https://llvm.org/PR57190 Change-Id: I24fe93a5ad7bf1568decaf6cf5c98f6b1c5d8ed4
2024-05-15Implement Vfnm vv/vf instructions as intrinsicsHaines Sy
Test: m berberis_all Change-Id: Iac623304a5a258ab0c6a58a5774f686b8545a290
2024-05-15Merge "Implement vfmacc/sac/add/sub vv/vf as intrinsics" into mainHaines Sy
2024-05-15riscv64: Spill fp args into int regsJeremiah Griffin
The RISC-V LP64D calling convention specifies that floating-point arguments are first passed in the floating-point argument registers (fa0..7), then in the general-purpose argument registers (a0..7), then on the stack. Our implementation was spilling directly from the FP registers onto the stack, skipping the integer registers. This caused problems for functions passing more than 8 FP parameters but fewer than 8 integer parameters. Test: berberis_run_host_tests, CtsJniTestCases Bug: 330396865 Change-Id: Ia52839d07f5f1589bf2df9427e77827ef59d7ef1
2024-05-14Implement vfmacc/sac/add/sub vv/vf as intrinsicsHaines Sy
Test: m berberis_all Change-Id: I26e063c65dd4a8ec83a527ff900c477a0b8cffdf
2024-05-14Call InitBerberis() for all testsdimitry
Test: builds, treehugger (cherry picked from https://googleplex-android-review.googlesource.com/q/commit:f8025548ac776ebaa91ba68fe088b217fcbd379d) Merged-In: I8af59af5f9681e76e8adfbe7d1115c6614fb07e7 Change-Id: I8af59af5f9681e76e8adfbe7d1115c6614fb07e7
2024-05-11[heavy_opt/riscv64] Fix load of 64-bit csrPaul Daniel Faria
Needed to and with the value of the constant and not its memory address. Test: m berberis_all berberis_run_host_tests, inline asm tests Change-Id: I6acc10da85213e7b01b30cd4210cc71e3874fdad
2024-05-11Merge "Fix /proc/self/maps emulation for bionic tests" into mainTreehugger Robot
2024-05-10Fix /proc/self/maps emulation for bionic testsLev Rumyantsev
There are 3 issues 1. Do not use malloc. Some tests read /proc/self/maps under malloc_disable(). Use Arena/mmap based data structures instead and define helper functions that support custom allocators. 2. Do not add newline at the end. Kernel doesn't do that and test's parser doesn't allow empty lines. 3. Gracefully handle invalid pointers passed as 'path' to OpenatForGuest. This is done by calling stat() on it. Test: CtsBionicTestCases Test: ndk_program_tests --gtest_filter=*ProcSelf* Bug: 338211718 Change-Id: I38314dbd8686875f917b578b56210b476a13e6d0
2024-05-11Merge "Specify FMax/FMin float intrinsics for riscv64" into mainAkira Baruah
2024-05-09inline_asm_tests: add the rest of reduction testsLev Rumyantsev
Test: inline_asm_tests Bug: 301577077 Change-Id: Iaa5c6eb96980d15c83316ae07e8acee1c4b1e52f
2024-05-09inline_asm_tests: add vfredosum.vs testLev Rumyantsev
Test: inline_asm_tests Bug: 301577077 Change-Id: I7d4e561279278b23c1ba7a69a301c1fd15e71399
2024-05-09inline_asm_tests: add SIMD128Lev Rumyantsev
It's a wrapper around __uint128_t which can be constructed from a pair of uint64_t literals. Test: inline_asm_tests Bug: 301577077 Change-Id: Id7eeedeacfd6abd1f1136367c0a7436d35750598
2024-05-09inline_asm_tests: add agnostic-is-undisturbed optionLev Rumyantsev
Agnostic tail handling can be legally implemented as undisturbed. Add an option which can be used for devices employing this approach. Since passing command line arguments to a gtest is non-trivial we use env variable. Test: inline_asm_tests Bug: 301577077 Change-Id: If250aa012d532086cb9b395dd73cdfefc156bea2
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-30 14:55:21 +0000