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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2292134
Change-Id: Id75348553e4ac0aa14325c221e3a32ee63e67bd3
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2292134
Change-Id: If00722456d21e0615c3852d27dcda437e125c823
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2292134
Change-Id: I0c982084db2192bac01c10ab7fb58b7c291b854b
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Use the same visibility as libvixl.
Test: m test-art-host-gtest
Test: testrunner.py --host --optimizing
Bug: 186902856
Bug: 240930225
Change-Id: I828a1cee186431b4df699d29b73d653df092277d
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2247319
Change-Id: I2d9d2d21a6db47aa390bfe9ba6a481e818c36fde
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2247319
Change-Id: I723b91e9573b1488e812e2355b88356fb0272fcb
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2247319
Change-Id: I1326ba0e71e12b4f6569a0347fff04506b12e84d
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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It's a syntax error to have 'CheckOptions' without key-value.
Bug: 252877310
Test: TIDY_EXTERNAL_VENDOR=1 make tidy-external-vixl
Change-Id: Ia35dd43f0d13b2cb81bb78887d72a8d6333e4efa
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am: 8a92549520 am: cac9830c3b am: c37e0cbf06 am: 38afe47e90
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2039054
Change-Id: I7ec83d739ce6aff82829d59088b54d78be7f214a
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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am: 8a92549520 am: cac9830c3b am: c37e0cbf06
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2039054
Change-Id: If9995a8ca1823296ab4e194718ea6aaeedbd9495
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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am: 8a92549520 am: cac9830c3b
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2039054
Change-Id: I7a0868921341413e0eb902d17c01d517d804ae25
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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am: 8a92549520
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2039054
Change-Id: I075a5caad5df60ddfe11278976e25e08ea76dad2
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2039054
Change-Id: I55cdcd8926d6ad99cf69fa1cb41c5719a2fa0a52
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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This patch updates the ART internal VIXL repo by merging in the
public VIXL tag 6.3.0 (https://github.com/Linaro/vixl/tree/6.3.0).
ece47d8a Update code coverage results
61608bac Simplify disassembler for already decoded mnemonics #5
cacab510 Simplify disassembler for already decoded mnemonics #4
918eb5f5 Simplify disassembler for already decoded mnemonics #3
20a0a232 Simplify disassembler for already decoded mnemonics #2
f4b19492 Simplify disassembler for already decoded mnemonics
d48909dd Replace Hash() calls with user-defined literal
a6acff44 Use statically-initialised std::vectors for decoder data
f330cae9 Replace strings with 2-bit encodings for decoder bit patterns
8afff39f Index form-to-visitor maps by hash
3b2c3fd5 Remove per-instruction functions and data structures
57fbc25c Fix tracing atomic instructions
19889347 Clear upper parts of register in scalar [su]cvtf simulation
1e97cefc Add explicit IsImmediatePre/PostIndex tests
5ed297b5 aarch64: Allow testing for the presence of FEAT_RPRES
d37468bc aarch64: Allow testing for the presence of FEAT_ECV
ea8fa657 Don't declare form_to_visitor maps as static member
eb24cffa Fix AArch32 bitwise-or use
ad01a0b0 aarch64: Allow testing for the presence of FEAT_MTE
efec2fba aarch64: Allow testing for the presence of FEAT_AFP
0222be8f Add FlagM2 to HWCAP feature bits
ae0af059 Avoid GCC 10 compiler error
8963d732 Update code coverage (#18)
c02b4be2 Fix section header in supported instructions document (#15)
dedebbf8 Fix -Wshadow on MacOS (#16)
e3f43860 Add note on contributions to README
c4470cfc fix: do not force HARDFLOAT when using soft fp (#8)
3bda0219 Remove PREFIX from some disassembler tests
256dcb97 Update supported instruction document
6e8db235 Enable -Wshadow and fix resulting errors
96933253 Fix bitwise-instead-of-logical warning in assembler-aarch64.cc (#10)
25954a79 assembler-aarch64: Prevent -Wshadow warning (#9)
41059e27 Update feature table
0758cf6f Add native execution to aarch64/getting-started.cc (#11)
d2ee88a4 Disable linter on regex calls (#14)
2dbede48 Update code coverage record. (#12)
3ea007f0 Remove more switches from disassembler
c22be27f Merge instruction maps to reduce duplication
f770a2cc Add regression test for Neon unallocated encodings
62b88f73 Remove more unallocated encodings from disassembly of Neon instruction
0239b124 Remove unallocated encodings from disassembly of Neon scalar 2Reg group
125278f5 Remove unallocated encodings from disassembly of Neon scalar shifts group
4eafa5ef Remove unallocated encodings from disassembly of Neon Across group
05546f3f Remove unallocated encodings from disassembly of Neon scalar 3Same group
72d7f69d Remove unallocated encodings from disassembly of Neon scalar indexed multiply group
31c808eb Remove unallocated encodings from disassembly of Neon Mul and Shift groups
7c70c928 Remove unallocated encodings from disassembly of Neon Ext and 3Diff groups
99d30eea Disassemble undefined encodings as unallocated in Neon 3Same
2ebb3b81 Use undefined Neon format as indicator of unallocated encoding
52f114fa Fix disassembly of indexed FMUL
02adc1a6 Tidy up no-argument disassembly
09925d47 Add support for Neon mixed-sign dot product instructions
876aaced Tidy up indexed element Neon simulation
405638d3 Tidy up indexed element Neon disassembly
286dce7d [sve] Add support for mixed sign dot product instructions
eecb6079 [sve] Add support for octo replicating loads
8876839b Add missing addressing mode for ld1rq and ldnt1
ad16ac68 Prevent tests passing with old code coverage data.
e441df57 Remove unallocated encodings from bitfield instructions
ed5e03d4 Re-enable clang-tidy for simulator
8b1e739d Implement Neon matrix multiplication
e642a967 Implement SVE matrix multiplication
c20aa622 Extend instruction-level decoding globally
c29d8691 Fix disassembly near SVE extend instructions
d647efaa Merge bit extract instantiations in decoder
ae5957cd Add code coverage reporting script
c9d0c2b0 Add architecture feature table to README
e6100d9f [sve] Fix using movprfx with fcmla
15edd8f0 Merge branch 'main' into sve2
58fecbda Simplify the argument list in the simulation of fcvt.
bf424385 [sve2] Add support for constructive extract
202f1c03 Fix fcvtn/fcvtxn when dst == src
13c08b72 [sve2] Enable some multiply tests
5319db71 Fix simulation of fcvtn
03686b14 [sve2] Add more tests for movprfx
bebdfeb2 [sve2] Support movprfx checking for SVE2 instructions
11ad9452 [sve2] Implement saturating doubling multiply high indexed
4b493889 [sve2] Implement FP convert long/narrow top
a0a28e48 [sve2] Implement saturating multiply-add high (indexed) (#6)
cad27c5b [sve2] Fix saturating rounding doubling multiply accumulate simulation
3c6c2e36 Update README with build status
95e7339a [sve2] Implement FP convert rounding to odd
317abf7a [sve2] Implement indexed FP long multiply-accumulate
14e4ddd3 [sve2] Implement floating point pairwise instructions
342876b2 [sve2] Implement floating point binary log
0ebd9e79 [sve2] Implement indexed complex multiply
1a3c3fd7 Fix cpplint link
b0a2e281 Further tighten AArch32 push/pop selection.
57ed1cef Use IsPowerOf2.
bdde97c9 Optimize GetFirstAvailableRegister() using CountTrailingZeros().
530cd410 Fix invalid encoding for single register push/pop.
e66d9ce2 Fix clang build.
20123dc1 Redirect repository links to GitHub.
310326bc [sve2] Implement saturating doubling multiply high
1b82f175 [sve2] Fix complex multiply accumulate simulation
ec8342c2 [sve2] Fix incomplete macro-assembly support.
573246c0 [sve2] Implement indexed multiply long
2e66dc71 [sve2] Implement indexed multiply-accumulate long
ba9a148b [sve2] Implement floating point multiply add long (vector)
05545665 [sve2] Implement saturating multiply-add bottom/top (indexed)
21d46841 Fix encoding for integer PAC instructions with zero context
5c080299 [sve2] Implement saturating multiply-add interleaved long
3cb35a64 [sve2] Implement saturating multiply-add long
6b67f6e1 [sve2] Implement complex saturating multiply-add (indexed)
ada6b35f [sve2] Implement complex integer multiply-add (vector).
7c107ea3 Skip top 64-bit write in movi if identical.
4a454b46 [sve2] Implement multiply-accumulate long
8f4e169d [sve2] Implement indexed integer multiply-accumulate/subtract
f272b9cc [sve2] Implement indexed integer multiply
35636df8 [sve2] Implement pointer conflict comparison
1c7b9ae6 [sve2] Implement constructive splice
1bb3f1a8 [sve2] Implement indexed integer complex dot product
f084401a [sve2] Implement compare scalars
b1b95789 [sve2] Implement bitwise ternary operations
1ac83572 [sve2] Implement vector-plus-scalar non-temporal stores
932cbb0c [sve2] Implement vector-plus-scalar non-temporal loads
f4da220e [sve2] Implement integer complex dot product
99c6049d [sve2] Implement table
710ec6f4 [sve2] Implement histogram count segment
2ed1d317 Fix ldapr test
bb4ed214 Add missing aliases for mov instruction with immediate
030875cf [sve2] Implement histogram count
78de9512 [sve] Fix while simulation corner case
97ca806d [sve2] Implement exclusive or and rotate
1719b713 [sve2] Implement saturating multiply long (indexed)
236e7ae1 [sve2] Implement integer multiply long (vector)
507dd4e6 [sve2] Implement bit permutation
819dcf91 [sve2] Implement complex addition
8b9c44b4 [sve2] Implement add/sub high and narrow
c4b56bb6 [sve2] Implement add/sub with carry long
67d2f824 [sve2] Implement absolute difference accumulate long
ea9b4070 [sve2] Implement shift right narrow
51dcef9c [sve2] Implement shift left long
7cf66e88 [sve2] Implement add/sub wide
c7275e62 [sve2] Implement long arithmetic
7ebf9cc0 [sve2] Implement predicated integer unary ops
a2d7fbbf [sve2] Implement interleaved arithmetic long
1dba0fbe [sve2] Implement integer multiply vectors (unpredicated)
602aa121 [sve2] Implement integer pairwise add and accumulate long
efbd8794 [sve2] Implement saturating multiply add high (vector)
cd14aebf [sve2] Implement eorbt and eortb
b5636e5c [sve2] Implement extract and narrow
fa1e2116 [sve2] Implement integer arithmetic pair
9b532197 [sve2] Implement predicated saturating arithmetic
3a3560fa [sve2] Implement shift right and accumulate
42bd8e95 [sve2] Implement predicated shift by vector
d8fc5437 [sve2] Implement predicated shift immediate instructions
78743b65 [sve2] Implement shift left/right and insert
4e1980d6 [sve2] Implement halving add/subtract
dba51cca [sve2] Simulator test generator
eb37ef3c [sve2] Implement saba and uaba
04abdbb5 Merge branch 'master' into sve2
51643312 [sve2] Implement match and nmatch
310a082b [sve] Handle B encoding for FP instructions correctly
4a22e655 [sve2] Fix formatting in features auditor
593f3558 Add missing copyright header on decoder map file.
b342cdf9 Set the default Gerrit branch to 'sve2'.
382ccf71 [sve2] Update CPUFeaturesAuditor
54688ebd [sve2] Add disabled disassembler tests
6bf2875f [sve2] Add simulator skeleton
ec07c896 [sve2] Disassemble using new decoder interface
8c69185d [sve2] Decode SVE2 instructions
243d76d8 Merge branch 'master' into sve2
bee3fc3e [sve2] Add basic MacroAssembler functions
2dc59111 [sve2] Add assembler skeleton
1a3aac06 Handle and detect SVE2 CPU features.
Change-Id: I174a46e3d1c1e0bb098a160af0b83a91652da813
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a5de832367 am: bf69e9016d am: dee355edc6
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2069577
Change-Id: I884aaff845af83ec2a80093d16704cfa1841bc1c
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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a5de832367 am: bf69e9016d
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2069577
Change-Id: I2311e4ae8ea7222d4ae105cacd193aac0391f790
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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a5de832367
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2069577
Change-Id: I09c337a3435f918665925f0522507f371930fa30
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2069577
Change-Id: If3a1ab982c2601316f17c36b30c415549fee481f
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2069577
Change-Id: I33c1490d5121bb53049a7541943fc7e8b6eaf763
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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Further simplification of the disassembler using mnemonics provided by the
decoder.
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Further simplification of the disassembler using mnemonics provided by the
decoder.
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Further simplification of the disassembler using mnemonics provided by the
decoder.
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Further simplification of the disassembler using mnemonics provided by the
decoder. Also, improve consistency of "unallocated" being reported for those
instructions that are undefined.
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The decoder provides its users with a string that contains the mnemonic, and the
disassembler already extracts this. Introduce a new function that uses this
mnemonic, and apply it to the simplest disassembly cases.
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Where possible, apply the hash-computing user-defined literal ""_h, for clarity
and maintainability.
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Replace fixed size arrays with std::vector for static data used by the decoder,
and store const references rather than copies in each decoding node.
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Test: Treehugger
Bug: 226636335
Change-Id: Iab7ad5181fb4a1bf08e4f7861f3ff4145116ea26
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Implement a user-defined literal to store existing decoder bit patterns as
binary representations at build time, reducing the amount of static data used.
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Introduce a user-defined literal that converts a string into its hash, and use
it to initialises the keys in form-to-visitor maps.
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Improve static code/data size by:
1) Removing the per-instruction visitor functions. The generic Visit()
function can be overridden instead to intercept individual instructions, as
shown in the existing custom disassembler example.
2) Remove the array of instruction forms. Instead infer the forms from the
decoder tree defined by kDecodeMapping.
As it's now unused, remove the INSTRUCTION_VISITOR_LIST define too.
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Atomic instructions were calling the trace logging with the wrong element size,
causing assertion failures when tracing them. Fix this, and add atomic
instructions to the trace tests.
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Scalar SIMD operations that write b, h, s or d registers should set the upper
parts of the destination register to zero. Fix the scvtf and ucvtf instructions
and add tests for all SISD instructions.
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am: 436a93d15f am: 9cd048e248 am: 672520c31a am: d07cf39201
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: Id833cb126aaaea3174d6d7dcd6888b6f1d60c9dd
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am: 436a93d15f am: 9cd048e248 am: 672520c31a
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: Id0a2afc88cd437c59c6f2e287aa7e49563bfc5d0
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am: 436a93d15f am: 9cd048e248 am: 672520c31a
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: I9d94691f10f36d96e4d193fb1cda2caf1b77127a
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am: 436a93d15f am: 9cd048e248
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: Ie0727e2bee8efb90afef52891d8b0c3eadaf49ae
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am: 436a93d15f
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: Ie3a46f5f10845449a5435348d195fb5ce4753c72
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/2018609
Change-Id: I607b97df2843986cd9b4f976e0009d70af76c099
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The MemOperand methods IsPreIndex() and IsPostIndex() checked only the
addressing mode, leaving the source of the index (immediate or register)
ambiguous. Add new versions that explicitly check for an immediate, and update
the code to use them.
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For convenience, builds against musl libc currently use the
linux_glibc properties because they are almost always linux-specific
and not glibc-specific. In preparation for removing this hack,
tweak the linux_glibc properties by either moving them to host_linux,
which will apply to linux_glibc, linux_musl and linux_bionic, or
by setting appropriate musl or linux_musl properties. Properties
that must not be repeated while musl uses linux_musl and also still
uses the linux_glibc properties are moved to glibc properties, which
don't apply to musl. Whether these stay as glibc properties or get
moved back to linux_glibc later once the musl hack is removed is TBD.
Bug: 223257095
Test: m checkbuild
Test: m USE_HOST_MUSL=true host-native
Change-Id: Ib0d3182fa8372d7ae26af474a27a1f7606f89219
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Allows testing for the presence of increased precision of
Reciprocal Estimate and Reciprocal Square Root Estimate
from an 8-bit mantissa to a 12-bit mantissa.
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Allows querying for the presence of Enhanced Counter Virtualization.
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Declaring the form_to_visitor maps as static members caused integration problems
for some users. Instead, use a Singleton-like construction to wrap the map in
a static accessor. Additionally, use unordered_map, as we don't need the
ordered property of map.
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am: cb6cf127d5
Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/1971939
Change-Id: I8fa6259eac81d50ce8405fd5f1692ed8e7612657
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/1971939
Change-Id: I3dacd0c02100caa647d427ce604da7518330352e
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/1971939
Change-Id: I04467fc0feeb6029a20f6bc72aa16eedba74a49f
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Original change: https://android-review.googlesource.com/c/platform/external/vixl/+/1971939
Change-Id: Ifc7df9fbfa1e23f29a27c4d6f1b31090a8c9019e
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Clang reports using bitwise-or where it expects logical-or as a warning.
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Bug: http://b/217563632
Bug: http://b/215753485
This was found by upcoming clang-r445002 update.
external/vixl/src/aarch64/assembler-aarch64.cc:2738:17: error: use of
bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical]
VIXL_ASSERT(vd.Is2S() | vd.Is4S());
external/vixl/src/aarch64/assembler-aarch64.cc:2755:17: error: use of
bitwise '|' with boolean operands [-Werror,-Wbitwise-instead-of-logical]
VIXL_ASSERT(vd.Is4H() | vd.Is8H());
external/vixl/src/aarch32/operands-aarch32.h:296:35: warning: use of
bitwise '|' with boolean operands [-Wbitwise-instead-of-logical]
bool IsInteger() const { return IsInteger32() | IsInteger64(); }
Test: Build with new clang
Change-Id: I5b77e90881a0cc7ff0266c69f035abc2d3266a7e
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