diff options
| author | Alexandre Rames <alexandre.rames@arm.com> | 2014-12-16 20:35:25 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2014-12-16 20:35:25 +0000 |
| commit | fdd96b5d741d9522bf8c2f5f758c8536b4600fe8 (patch) | |
| tree | bbbe1ac0f5b0a6825d9e6c0abee38a4c5db7104a | |
| parent | ed884d0fa3add9d19f7861cbed4e5291bef6362e (diff) | |
| parent | fabbee44f3e36412995992b7544143155d11d2c3 (diff) | |
| download | vixl-fdd96b5d741d9522bf8c2f5f758c8536b4600fe8.tar.gz | |
am fabbee44: Revert "Use gcc for arm64 target when clang fails." with the fix.
* commit 'fabbee44f3e36412995992b7544143155d11d2c3':
Revert "Use gcc for arm64 target when clang fails." with the fix.
| -rw-r--r-- | Android.mk | 22 | ||||
| -rw-r--r-- | src/a64/cpu-a64.cc | 3 |
2 files changed, 7 insertions, 18 deletions
@@ -54,18 +54,6 @@ LOCAL_PATH:= $(call my-dir) -# Some build targets select clang compiler and some use default, -# but clang compiler rejects cpu-a64.c. -# a64/cpu-a64.cc:69:39: error: value size does not match register size -# specified by the constraint and modifier [-Werror,-Wasm-operand-widths] -ifeq ($(TARGET_ARCH),arm64) - vixl_use_clang := false - vixl_default_clang := false -else - vixl_use_clang := true - vixl_default_clang := -endif - vixl_include_files := $(LOCAL_PATH)/src/ \ vixl_src_files := \ @@ -117,7 +105,7 @@ vixl_cpp_flags_debug := \ include $(CLEAR_VARS) -LOCAL_CLANG := $(vixl_default_clang) +LOCAL_CLANG := true LOCAL_CPP_EXTENSION := .cc LOCAL_CPPFLAGS := $(vixl_cpp_flags_release) LOCAL_CPPFLAGS_arm64 := -UUSE_SIMULATOR @@ -131,7 +119,7 @@ include external/libcxx/libcxx.mk include $(BUILD_SHARED_LIBRARY) include $(CLEAR_VARS) -LOCAL_CLANG := $(vixl_default_clang) +LOCAL_CLANG := true LOCAL_CPP_EXTENSION := .cc LOCAL_CPPFLAGS := $(vixl_cpp_flags_debug) LOCAL_CPPFLAGS_arm64 := -UUSE_SIMULATOR @@ -146,7 +134,7 @@ include $(BUILD_SHARED_LIBRARY) include $(CLEAR_VARS) -LOCAL_CLANG := $(vixl_use_clang) +LOCAL_CLANG := true LOCAL_CPP_EXTENSION := .cc LOCAL_CPPFLAGS := $(vixl_cpp_flags_release) LOCAL_C_INCLUDES := $(vixl_include_files) @@ -160,7 +148,7 @@ include external/libcxx/libcxx.mk include $(BUILD_HOST_SHARED_LIBRARY) include $(CLEAR_VARS) -LOCAL_CLANG := $(vixl_use_clang) +LOCAL_CLANG := true LOCAL_CPP_EXTENSION := .cc LOCAL_CPPFLAGS := $(vixl_cpp_flags_debug) LOCAL_C_INCLUDES := $(vixl_include_files) @@ -180,7 +168,7 @@ include $(BUILD_HOST_SHARED_LIBRARY) # To run all the tests: vixl-test-runner --run_all # include $(CLEAR_VARS) -LOCAL_CLANG := $(vixl_use_clang) +LOCAL_CLANG := true LOCAL_CPP_EXTENSION := .cc LOCAL_CPPFLAGS := $(vixl_cpp_flags_debug) LOCAL_C_INCLUDES := $(vixl_include_files) diff --git a/src/a64/cpu-a64.cc b/src/a64/cpu-a64.cc index 082e7745..ffa70c38 100644 --- a/src/a64/cpu-a64.cc +++ b/src/a64/cpu-a64.cc @@ -63,10 +63,11 @@ uint32_t CPU::GetCacheType() { // simulator will not need this information. return 0; #else - uint32_t cache_type_register; + uint64_t cache_type_register; // Copy the content of the cache type register to a core register. __asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT : [ctr] "=r" (cache_type_register)); + VIXL_ASSERT(is_uint32(cache_type_register)); return cache_type_register; #endif } |