From aefb89536ab19b76ab33a10032e1f8c2c47fdb15 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Fri, 3 May 2024 18:10:41 +0200 Subject: drm/amdgpu: don't use MAP_CACHE_WC for GTT blobs without WC With this change we get similar performance when reading from GTT allocated without AMDGPU_GEM_CREATE_CPU_GTT_USWC in the guest and in the host. Part-of: --- src/drm/amdgpu/amdgpu_renderer.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/src/drm/amdgpu/amdgpu_renderer.c b/src/drm/amdgpu/amdgpu_renderer.c index 7db59bed..948d0741 100644 --- a/src/drm/amdgpu/amdgpu_renderer.c +++ b/src/drm/amdgpu/amdgpu_renderer.c @@ -151,8 +151,9 @@ struct amdgpu_object { uint32_t flags; uint32_t size; - bool has_metadata : 1; - bool exported : 1; + bool has_metadata :1; + bool exported :1; + bool enable_cache_wc :1; }; static void free_amdgpu_object(struct amdgpu_context *ctx, struct amdgpu_object *obj); @@ -565,7 +566,10 @@ amdgpu_renderer_get_blob(struct virgl_context *vctx, uint32_t res_id, uint64_t b return -ENOENT; } - blob->map_info = VIRGL_RENDERER_MAP_CACHE_WC; + if (obj->enable_cache_wc) + blob->map_info = VIRGL_RENDERER_MAP_CACHE_WC; + else + blob->map_info = VIRGL_RENDERER_MAP_CACHE_CACHED; /* a memory can only be exported once; we don't want two resources to point * to the same storage. @@ -695,6 +699,10 @@ amdgpu_ccmd_gem_new(struct amdgpu_context *ctx, const struct vdrm_ccmd_req *hdr) goto export_failed; obj->gem_handle = gem_handle; + /* Enable Write-Combine except for GTT buffers with WC disabled. */ + obj->enable_cache_wc = + (req->r.preferred_heap != AMDGPU_GEM_DOMAIN_GTT) || + (req->r.flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC); amdgpu_object_set_blob_id(ctx, obj, req->blob_id); -- cgit v1.2.3