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| author | David Rosca <nowrep@gmail.com> | 2024-04-16 19:31:29 +0200 |
|---|---|---|
| committer | Eric Engestrom <eric@engestrom.ch> | 2024-04-29 16:32:38 +0200 |
| commit | 526eeb0b86eea3c9644461e824e05c623ebb4b8b (patch) | |
| tree | 2e86760eac9425e9b4331e61798866379a06547d | |
| parent | 9fff8df5c3616e2fef41610f22c1ce08e8c99d4a (diff) | |
| download | mesa3d-526eeb0b86eea3c9644461e824e05c623ebb4b8b.tar.gz | |
radeonsi/vcn: Fix 10bit HEVC VPS general_profile_compatibility_flags
Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28945>
(cherry picked from commit b144f501906dcb4a54e0aa8d699768c8d9d13bbb)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c | 7 |
2 files changed, 7 insertions, 2 deletions
diff --git a/.pick_status.json b/.pick_status.json index 3d3b2c72487..e4389111cb3 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -94,7 +94,7 @@ "description": "radeonsi/vcn: Fix 10bit HEVC VPS general_profile_compatibility_flags", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c index 88c9aba3a9f..2dc112934e8 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_enc_1_2.c @@ -780,7 +780,12 @@ static void radeon_enc_nalu_vps(struct radeon_encoder *enc) radeon_enc_code_fixed_bits(enc, 0x0, 2); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_tier_flag, 1); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_profile_idc, 5); - radeon_enc_code_fixed_bits(enc, 0x60000000, 32); + + if (enc->enc_pic.general_profile_idc == 2) + radeon_enc_code_fixed_bits(enc, 0x20000000, 32); + else + radeon_enc_code_fixed_bits(enc, 0x60000000, 32); + radeon_enc_code_fixed_bits(enc, 0xb0000000, 32); radeon_enc_code_fixed_bits(enc, 0x0, 16); radeon_enc_code_fixed_bits(enc, enc->enc_pic.general_level_idc, 8); |