From 3fa0a85ce8cf7324cf0135acfcf6687b157d14e3 Mon Sep 17 00:00:00 2001 From: Matheus Almeida Date: Wed, 30 Apr 2014 16:29:56 +0000 Subject: [mips] Add instruction alias (sltu). Summary: The pattern sltu $r1, $r2, $imm is found in handwritten assembly which is just a shorthand version of sltui $r1, $r2, $imm. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3508 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207671 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsInstrInfo.td | 2 ++ test/MC/Mips/mips1/valid.s | 1 + test/MC/Mips/mips2/valid.s | 1 + test/MC/Mips/mips3/valid.s | 1 + test/MC/Mips/mips32/valid.s | 1 + test/MC/Mips/mips32r2/valid.s | 1 + test/MC/Mips/mips4/valid.s | 1 + test/MC/Mips/mips5/valid.s | 1 + test/MC/Mips/mips64/valid.s | 1 + test/MC/Mips/mips64r2/valid.s | 1 + 10 files changed, 11 insertions(+) diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index fdac180047..62cb7c3359 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1219,6 +1219,8 @@ def : InstAlias<"negu $rt, $rs", (SUBu GPR32Opnd:$rt, ZERO, GPR32Opnd:$rs), 1>; def : InstAlias<"slt $rs, $rt, $imm", (SLTi GPR32Opnd:$rs, GPR32Opnd:$rt, simm16:$imm), 0>; +def : InstAlias<"sltu $rt, $rs, $imm", + (SLTiu GPR32Opnd:$rt, GPR32Opnd:$rs, simm16:$imm), 0>; def : InstAlias<"xor $rs, $rt, $imm", (XORi GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>; def : InstAlias<"or $rs, $rt, $imm", diff --git a/test/MC/Mips/mips1/valid.s b/test/MC/Mips/mips1/valid.s index ec8757f3ec..33968f9fe9 100644 --- a/test/MC/Mips/mips1/valid.s +++ b/test/MC/Mips/mips1/valid.s @@ -74,6 +74,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3] srav $s1,$sp # CHECK: srav $17, $17, $sp # encoding: [0x03,0xb1,0x88,0x07] diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s index 77cf8c5af4..7772a001a3 100644 --- a/test/MC/Mips/mips2/valid.s +++ b/test/MC/Mips/mips2/valid.s @@ -86,6 +86,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips3/valid.s b/test/MC/Mips/mips3/valid.s index ea4234e9d6..ba37441ee6 100644 --- a/test/MC/Mips/mips3/valid.s +++ b/test/MC/Mips/mips3/valid.s @@ -139,6 +139,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index c1005aa9bb..e13edc1d7e 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -110,6 +110,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips32r2/valid.s b/test/MC/Mips/mips32r2/valid.s index 54bc65bbe6..b30485c881 100644 --- a/test/MC/Mips/mips32r2/valid.s +++ b/test/MC/Mips/mips32r2/valid.s @@ -136,6 +136,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips4/valid.s b/test/MC/Mips/mips4/valid.s index 27c487f03c..2b002b9179 100644 --- a/test/MC/Mips/mips4/valid.s +++ b/test/MC/Mips/mips4/valid.s @@ -155,6 +155,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips5/valid.s b/test/MC/Mips/mips5/valid.s index 1127ee5394..a65514b769 100644 --- a/test/MC/Mips/mips5/valid.s +++ b/test/MC/Mips/mips5/valid.s @@ -155,6 +155,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s index fd607dd02f..04c2f5b6f9 100644 --- a/test/MC/Mips/mips64/valid.s +++ b/test/MC/Mips/mips64/valid.s @@ -168,6 +168,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s index 357c4e5b5e..99f19f68a4 100644 --- a/test/MC/Mips/mips64r2/valid.s +++ b/test/MC/Mips/mips64r2/valid.s @@ -192,6 +192,7 @@ slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11] sltiu $t9,$t9,-15531 # CHECK: sltiu $25, $25, -15531 # encoding: [0x2f,0x39,0xc3,0x55] sltu $s4,$s5,$11 # CHECK: sltu $20, $21, $11 # encoding: [0x02,0xab,0xa0,0x2b] + sltu $t8,$t9,-15531 # CHECK: sltiu $24, $25, -15531 # encoding: [0x2f,0x38,0xc3,0x55] sqrt.d $f17,$f22 sqrt.s $f0,$f1 sra $s1,15 # CHECK: sra $17, $17, 15 # encoding: [0x00,0x11,0x8b,0xc3] -- cgit v1.2.3