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This is cherry picked from ag/1380640 and ag/1483972.
Test: wayland_service builds.
Change-Id: I09eb7d8837c639a668a18545ab23cab2d7c6b751
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- ALOGE usage in gralloc_drm_handle.h requires cutils/log.h
- HAL_PIXEL_FORMAT_DRM_NV12 reference in gralloc_drm_intel.c requires
gralloc_drm_formats.h
Change-Id: I7f203e69ed9837c093c4bd01dc3cf5ad0b210ec3
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am: 19d91eec53
am: e19443ea00
Change-Id: Iade8059842115cf563a90cb44a37339f1ef22801
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am: 19d91eec53
Change-Id: I4e23e80ed6b8fdec3d5cfb983427591b8ab4597e
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am: 63dd4c8976
Change-Id: I4bd8c55bec3767b06b5965fa2795bb74f57929be
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am: 99e2a21625
Change-Id: I26067bf3de95c6d5b23549b53fdcd1417654aaf4
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two drm handle may use same bo, but there is no
reference protect. if one of the drm handle release
the bo, another handle's bo become a wildpointer,
any read/write on the wildpointer will cause system
unstable, crash.
Change-Id: Ieaca522e3372dba82c48961499b9b657ca33cd15
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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Bug: http://b/26747884
Change-Id: Ife86534c45642cdeb004e68b766c123a4131d6fe
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This patch adds necessary switch cases to enable allocation of flexible
YUV420 buffers. They currently always map to NV12 buffers.
Change-Id: I57daba972698033240f9086b7badfad75335be2e
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It is a workaround needed for video decoder hardware that requires extra
data at the end of the frame.
Change-Id: I6af8f8ae81a56bbbe3721b0cc3b333f09f6fb965
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It is needed for flexible YUV formats. Currently only flexible YUV420 is
supported and always maps to NV12 format.
Change-Id: I4b2f2d1cdd3f2495b63d84438130dc7ab99fbf8c
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In gralloc_drm_align_geometry(), the height will be adjusted to
include the UV planes. For the format HAL_PIXEL_FORMAT_YV12,
the hight of a VGA image (640x360) will be adjusted to 540. We
should not change the origin height in the handle.
Change-Id: I57901d94ae3e4b321b692b64b553923a201d4f3f
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* commit '47e7aba999eeca7b2db97ca388bc9c42524eec8e':
drm_gralloc: Add support for Rockchip DRM
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This patch adds backend for libdrm_rockchip to support drm_gralloc on
systems with Rockchip DRM.
Change-Id: Iedcf1cb25cc2462681f0355f939018037171d207
Signed-off-by: Tomasz Figa <tfiga@google.com>
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* commit '879cc4e7c6da5ecf631d65ddd98d12bccd5817f5':
drm_gralloc: Use render node
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* commit 'd225ab0eaecac84e5fd7199968a433a462af0196':
drm_gralloc: Move gralloc.c and gralloc_drm.c to cpp
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* commit '9b27aa890b10d27733dd6f4dc40fe006a2a87ad2':
drm_gralloc: Add drm_gralloc actions to gralloc_drm.h
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* commit 'd81a9375614e30376947013d24cea546d39e93fc':
drm_gralloc: Remove kms functionality
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* commit '5eeaf6970ee63bffe221da91bddeafcbb8405c78':
drm_gralloc: Remove NV12 format
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* commit '436a5fc69263d9f1c8ab8d52a0c8750f6a531b4c':
drm_gralloc: Use external/libdrm for includes
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Change-Id: I9bbee113e884d0c512a855e85fa88db4e3789a1e
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Change-Id: Id08a921c74fc431328ed92bb94bfeaa5764c3e5c
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Change-Id: If640f6ad7c6b904df59b5c5e164f184f1fc97170
Signed-off-by: Sean Paul <seanpaul@chromium.org>
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All of the kms functionality in gralloc should be handled
by hwcomposer.
Change-Id: I164a0af4d03aa4777e494e401cd81e841d3bfa33
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Signed-off-by: Sean Paul <seanpaul@chromium.org>
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Change-Id: Ibb6c964ed720971bffb00d53bfbfb18a459ba2a0
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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* commit '6ee8648e66cefb8891dfdf54303d3bc96f5d74a5':
Stop using stlport.
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Bug: http://b/15193147
Change-Id: Ief83f68317e466db176f09ebc38f7d738fe02e1e
(cherry picked from commit e3bfc6c7ecae6faeac3b0c02c53ef96c8a494998)
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Bug: http://b/15193147
Change-Id: Ief83f68317e466db176f09ebc38f7d738fe02e1e
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http://git.android-x86.org/platform/hardware/drm_gralloc
Bug: 18959563
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Just change the 'data' field of gralloc_drm_handle_t
to be a pointer to struct gralloc_drm_bo_t.
Fix some warnings as well.
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Convert LOCAL_MODULE_PATH to LOCAL_MODULE_RELATIVE_PATH
to support 64-bit targets.
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Copied radeon.h (radeon_probe.h) and radeon_chipinfo_gen.h from master branch
of http://cgit.freedesktop.org/xorg/driver/xf86-video-ati
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Old i915 doesn't have I915_EXEC_BLT bit. Only set the bit if it's available.
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This patch adds in a system property "debug.drm.mode.force", which works
*similarly* to "debug.drm.mode". XRESxYRES[@REFRESHRATE].
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Buffer objects created locally by gralloc_drm_bo_create() would have
their refcount properly initialized to 1, but those received from
other processes via the drv alloc function would be left at zero, so
the delete check in gralloc_drm_bo_decref() would not destroy them as
the refcount would wrap negative. The buffer would then leak forever
until the mapping process (often surfaceflinger!) exitted.
Issue: AXIA-2991
Change-Id: I1a0c73b21cfbc67b441970002fd71712112e1871
Signed-off-by: Andy Ross <andy.ross@windriver.com>
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currently we end up creating framebuffers with wrong format for RGBX
users and set_plane with these would show wrong colors, one example
is the menu screen of the glb27 application.
Change-Id: Ifa051a4c5e9f39a6427ae2864ac06955cb48ad2b
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Patch changes reserve_plane to get id number as additional parameter.
This can be used by hwc to make changes to a particular plane. New
api hwc_set_plane_handle is introduced so that hwc can change the
buffer handle of a plane, this is required because after plane has
been reserved for a particular ui layer, this handle can change as
the layer is typically multibuffered.
Change-Id: I32d711ff3565ae9e8f5b8a6691c22b03a50cefe7
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Current implementation supports planes only with primary
output, patch adds a check to guard this.
Change-Id: I537858122a4fe77a374031d11339eaaea27ad9bf
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Change-Id: I029aafe5a99393a4c0f7ff87f422317621fada12
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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It is a new Gallium-based driver for Intel GEN6+.
Change-Id: I8a73b6f276d4cc3d38427c2725d63710512bff32
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
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Reduces need to build with drm_gralloc headers elsewhere in tree.
Returning to system/graphics.h approach.
Change-Id: I26717cfe0a9a83ab263c26803e2849eb55560696
Depends-Change-Id: I405398b172fab19949fef33c89a60132b1bd0ea9
Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
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