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two drm handle may use same bo, but there is no
reference protect. if one of the drm handle release
the bo, another handle's bo become a wildpointer,
any read/write on the wildpointer will cause system
unstable, crash.
Change-Id: Ieaca522e3372dba82c48961499b9b657ca33cd15
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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This patch adds backend for libdrm_rockchip to support drm_gralloc on
systems with Rockchip DRM.
Change-Id: Iedcf1cb25cc2462681f0355f939018037171d207
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Change-Id: I9bbee113e884d0c512a855e85fa88db4e3789a1e
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Change-Id: Id08a921c74fc431328ed92bb94bfeaa5764c3e5c
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Change-Id: If640f6ad7c6b904df59b5c5e164f184f1fc97170
Signed-off-by: Sean Paul <seanpaul@chromium.org>
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All of the kms functionality in gralloc should be handled
by hwcomposer.
Change-Id: I164a0af4d03aa4777e494e401cd81e841d3bfa33
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Signed-off-by: Sean Paul <seanpaul@chromium.org>
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Change-Id: Ibb6c964ed720971bffb00d53bfbfb18a459ba2a0
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
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Bug: http://b/15193147
Change-Id: Ief83f68317e466db176f09ebc38f7d738fe02e1e
(cherry picked from commit e3bfc6c7ecae6faeac3b0c02c53ef96c8a494998)
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http://git.android-x86.org/platform/hardware/drm_gralloc
Bug: 18959563
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Just change the 'data' field of gralloc_drm_handle_t
to be a pointer to struct gralloc_drm_bo_t.
Fix some warnings as well.
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Convert LOCAL_MODULE_PATH to LOCAL_MODULE_RELATIVE_PATH
to support 64-bit targets.
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Copied radeon.h (radeon_probe.h) and radeon_chipinfo_gen.h from master branch
of http://cgit.freedesktop.org/xorg/driver/xf86-video-ati
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Old i915 doesn't have I915_EXEC_BLT bit. Only set the bit if it's available.
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This patch adds in a system property "debug.drm.mode.force", which works
*similarly* to "debug.drm.mode". XRESxYRES[@REFRESHRATE].
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Buffer objects created locally by gralloc_drm_bo_create() would have
their refcount properly initialized to 1, but those received from
other processes via the drv alloc function would be left at zero, so
the delete check in gralloc_drm_bo_decref() would not destroy them as
the refcount would wrap negative. The buffer would then leak forever
until the mapping process (often surfaceflinger!) exitted.
Issue: AXIA-2991
Change-Id: I1a0c73b21cfbc67b441970002fd71712112e1871
Signed-off-by: Andy Ross <andy.ross@windriver.com>
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currently we end up creating framebuffers with wrong format for RGBX
users and set_plane with these would show wrong colors, one example
is the menu screen of the glb27 application.
Change-Id: Ifa051a4c5e9f39a6427ae2864ac06955cb48ad2b
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Patch changes reserve_plane to get id number as additional parameter.
This can be used by hwc to make changes to a particular plane. New
api hwc_set_plane_handle is introduced so that hwc can change the
buffer handle of a plane, this is required because after plane has
been reserved for a particular ui layer, this handle can change as
the layer is typically multibuffered.
Change-Id: I32d711ff3565ae9e8f5b8a6691c22b03a50cefe7
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Current implementation supports planes only with primary
output, patch adds a check to guard this.
Change-Id: I537858122a4fe77a374031d11339eaaea27ad9bf
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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Change-Id: I029aafe5a99393a4c0f7ff87f422317621fada12
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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It is a new Gallium-based driver for Intel GEN6+.
Change-Id: I8a73b6f276d4cc3d38427c2725d63710512bff32
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
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Reduces need to build with drm_gralloc headers elsewhere in tree.
Returning to system/graphics.h approach.
Change-Id: I26717cfe0a9a83ab263c26803e2849eb55560696
Depends-Change-Id: I405398b172fab19949fef33c89a60132b1bd0ea9
Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
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patch introduces API between hwcomposer and gralloc, hwcomposer can
reserve an overlay plane to be used by a particular layer in prepare
hook, drmModeSetPlane for each plane gets called later when post()
gets called by the eglSwapBuffers (from hwcomposer set), this can be
later changed to use atomic modesetting code and drm properties to
make one 'atomic flip' for graphics + planes.
Change-Id: I3b7d179b285e43eb19fdc3b4c7ce093f3ba6aade
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Change-Id: Ifdf23b59542152c364d3ed010a4cc82bbf1a0103
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
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Patch uses the best mode available on hdmi output and creates
a private buffer that is used for pageflipping. Primary display
content is copied to private buffer on each page flip. This
patch removes current hack where same mode is assumed from hdmi
output, this caused graphical artifacts with some tv's. Also
some more debug output is added.
Change-Id: Ic862a8374f46992f0ff92545da8a010f9684b934
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Patch extends current copy api, renames it blit and introduces
src+dst coordinates to be able to implement partial blits and
blits with offsets. Implementation must take care of hw specific
restrictions with blits.
Patch also fixes issues with the current intel_blit function.
Current implementation does not select ring buffer and ends up
queuing blit commands to the render ring. Patch starts to use
drm_intel_bo_mrb_exec to be able to select blit ring and fixes
the checks inside copy function.
Change-Id: I05905e0b9c48fc2a55230212b676bfb8813a2b55
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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this way it can be accessed by hwcomposer module, which will
be required to implement jellybean mr1 hooks.
Change-Id: I68872243c30aee2d0eb76f38fe54efdea4862a66
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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This is done so that we should not have to do it dynamically during
composition. This information will be used later with hwcomposer module
when using planes for composition.
Change-Id: I2b6716fe9a8da81050645900c6c0955385946991
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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This patch reverts earlier cca14cfd... and introduces a new hw
specific hook to query yuv components offsets which can vary
between different hw, decoders, cameras etc.
Change-Id: Ib60bc8ee28df7bc9425b6d7934294fe36fc55354
Depends-Change-Id: I1aa5368b21e588d5d711c1005fff2a5296e143a0
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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The BO 'usage' can be different from the 'usage' passed to lock.
For example when the BO is created by SurfaceMediaSource, having set GRALLOC_USAGE_HW_TEXTURE
while the CPU locks it with GRALLOC_USAGE_SW_WRITE_OFTEN
Change-Id: I4ba0ac05f1833439299e7fd694208076e66f8dfd
Signed-off-by: Adrian Marius Negreanu <adrian.m.negreanu@intel.com>
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This function can be used from Mesa instead of having to expose the
whole gralloc_drm_handle_t structure.
Change-Id: I1aa5368b21e588d5d711c1005fff2a5296e143a0
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Patch adds add api for mesa to query component offsets for
yuv buffer handles.
Change-Id: Ib477627ad812f5b6352665d00fb2bb3b10fe5b8e
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Change-Id: If1c92810a17c60c29239f5384d6e971b015dd174
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Some of the functions in gralloc.$(TARGET_PRODUCT) can be reused.
Since one should not link against a HAL library, have gralloc.c
as gralloc.$(TARGET_PRODUCT) and extract the reusable code into
libgralloc_drm.
Change-Id: I08a6989bb0b191ec56662aa4a21f6da7aea6b24d
Signed-off-by: Adrian Marius Negreanu <adrian.m.negreanu@intel.com>
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Patch removes local outdated headers for intel hw and starts
to depend on ones from libdrm and mesa projects, this makes sure
we are up to date with new pci id's etc.
intel_init_kms_features required some fixing because of changed
macros, patch also adds GEN7 check in place for IVB and HSW.
Change-Id: Iee6375ceb558baf4334e3b9b5d26210406aa7b71
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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On some platforms we might have only HDMI connector, on those
platforms do not attempt to use cloned/extended mode with HDMI.
Change-Id: If0f21986030e4e97991202bd8168d7c9e25de493
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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Patch implements simple support for cloned mode hdmi by introducing
primary and hdmi outputs that are updated respectively.
Current implementation is rather naive and assumes hdmi can drive
same mode as the local lvds. Only cloned mode is supported but can be
extended later to support extended mode when hwcomposer is available
for controlling this behaviour.
HDMI hotplug is implemented as a separate observer thread that
listens to uevents and reads hdmi connection state from there, this
requires switch support from the kernel hdmi driver.
Change-Id: I147273bbe4d21ab9f390f38c9a5f945530c8fd2e
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Matt Gumbel <matthew.k.gumbel@linux.intel.com>
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This reverts commit 2d2758bca0f962ef21673dbe29df4c042d7f3254.
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Patch implements simple support for cloned mode hdmi by introducing
primary and hdmi outputs that are updated respectively.
Current implementation is rather naive and assumes hdmi can drive
same mode as the local lvds. Only cloned mode is supported but can be
extended later to support extended mode when hwcomposer is available
for controlling this behaviour.
HDMI hotplug is implemented as a separate observer thread that
listens to uevents and reads hdmi connection state from there, this
requires switch support from the kernel hdmi driver.
Change-Id: I1d5873214d672563789f4953a892de60539eca88
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Matt Gumbel <matthew.k.gumbel@linux.intel.com>
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not just fbs, potentially anything can be used as framebuffer by kms code
Change-Id: Ib710bb62ae23cf58a987c6614306711dedb11cbf
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
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