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authorDavid Neto <dneto@google.com>2024-01-24 16:06:13 -0500
committerGitHub <noreply@github.com>2024-01-24 16:06:13 -0500
commitae6a8b39717523d96683bc0d20b541944e28072f (patch)
treeb8802dd0aeea819b730c6ef01e60d8c1deedaed0
parent2b9ba211f3bde10dc638badc59157f7cd7e28d63 (diff)
downloadSPIRV-Headers-ae6a8b39717523d96683bc0d20b541944e28072f.tar.gz
SPV_KHR_float_controls2 (#409)
Diffstat
-rw-r--r--include/spirv/unified1/spirv.bf8
-rw-r--r--include/spirv/unified1/spirv.core.grammar.json40
-rw-r--r--include/spirv/unified1/spirv.cs8
-rw-r--r--include/spirv/unified1/spirv.h8
-rw-r--r--include/spirv/unified1/spirv.hpp8
-rw-r--r--include/spirv/unified1/spirv.hpp118
-rw-r--r--include/spirv/unified1/spirv.json7
-rw-r--r--include/spirv/unified1/spirv.lua8
-rw-r--r--include/spirv/unified1/spirv.py8
-rw-r--r--include/spirv/unified1/spv.d8
10 files changed, 107 insertions, 4 deletions
diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
index eb0abbd..615be7f 100644
--- a/include/spirv/unified1/spirv.bf
+++ b/include/spirv/unified1/spirv.bf
@@ -206,6 +206,7 @@ namespace Spv
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
MaximallyReconvergesKHR = 6023,
+ FPFastMathDefault = 6028,
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
@@ -426,8 +427,11 @@ namespace Spv
NSZ = 2,
AllowRecip = 3,
Fast = 4,
+ AllowContract = 16,
AllowContractFastINTEL = 16,
+ AllowReassoc = 17,
AllowReassocINTEL = 17,
+ AllowTransform = 18,
}
[AllowDuplicates, CRepr] public enum FPFastMathModeMask
@@ -438,8 +442,11 @@ namespace Spv
NSZ = 0x00000004,
AllowRecip = 0x00000008,
Fast = 0x00000010,
+ AllowContract = 0x00010000,
AllowContractFastINTEL = 0x00010000,
+ AllowReassoc = 0x00020000,
AllowReassocINTEL = 0x00020000,
+ AllowTransform = 0x00040000,
}
[AllowDuplicates, CRepr] public enum FPRoundingMode
@@ -1198,6 +1205,7 @@ namespace Spv
CooperativeMatrixKHR = 6022,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
+ FloatControls2 = 6029,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
index cea5c81..dc0d1f2 100644
--- a/include/spirv/unified1/spirv.core.grammar.json
+++ b/include/spirv/unified1/spirv.core.grammar.json
@@ -9990,15 +9990,33 @@
"version" : "1.0"
},
{
+ "enumerant" : "AllowContract",
+ "value" : "0x10000",
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "AllowContractFastINTEL",
"value" : "0x10000",
- "capabilities" : [ "FPFastMathModeINTEL" ],
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "AllowReassoc",
+ "value" : "0x20000",
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
"version" : "None"
},
{
"enumerant" : "AllowReassocINTEL",
"value" : "0x20000",
- "capabilities" : [ "FPFastMathModeINTEL" ],
+ "capabilities" : [ "FloatControls2", "FPFastMathModeINTEL" ],
+ "version" : "None"
+ },
+ {
+ "enumerant" : "AllowTransform",
+ "value" : "0x40000",
+ "capabilities" : [ "FloatControls2" ],
"version" : "None"
}
]
@@ -11507,6 +11525,16 @@
"version" : "None"
},
{
+ "enumerant" : "FPFastMathDefault",
+ "value" : 6028,
+ "parameters" : [
+ { "kind" : "IdRef", "name" : "'Target Type'" },
+ { "kind" : "IdRef", "name" : "'Fast-Math Mode'" }
+ ],
+ "capabilities" : [ "FloatControls2" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "StreamingInterfaceINTEL",
"value" : 6154,
"parameters" : [
@@ -12940,7 +12968,7 @@
{
"enumerant" : "FPFastMathMode",
"value" : 40,
- "capabilities" : [ "Kernel" ],
+ "capabilities" : [ "Kernel", "FloatControls2" ],
"parameters" : [
{ "kind" : "FPFastMathMode", "name" : "'Fast-Math Mode'" }
],
@@ -16270,6 +16298,12 @@
"version" : "None"
},
{
+ "enumerant" : "FloatControls2",
+ "value" : 6029,
+ "extensions" : [ "SPV_KHR_float_controls2" ],
+ "version" : "None"
+ },
+ {
"enumerant" : "AtomicFloat32AddEXT",
"value" : 6033,
"extensions" : [ "SPV_EXT_shader_atomic_float_add" ],
diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
index 248ae63..d651891 100644
--- a/include/spirv/unified1/spirv.cs
+++ b/include/spirv/unified1/spirv.cs
@@ -205,6 +205,7 @@ namespace Spv
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
MaximallyReconvergesKHR = 6023,
+ FPFastMathDefault = 6028,
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
@@ -425,8 +426,11 @@ namespace Spv
NSZ = 2,
AllowRecip = 3,
Fast = 4,
+ AllowContract = 16,
AllowContractFastINTEL = 16,
+ AllowReassoc = 17,
AllowReassocINTEL = 17,
+ AllowTransform = 18,
}
public enum FPFastMathModeMask
@@ -437,8 +441,11 @@ namespace Spv
NSZ = 0x00000004,
AllowRecip = 0x00000008,
Fast = 0x00000010,
+ AllowContract = 0x00010000,
AllowContractFastINTEL = 0x00010000,
+ AllowReassoc = 0x00020000,
AllowReassocINTEL = 0x00020000,
+ AllowTransform = 0x00040000,
}
public enum FPRoundingMode
@@ -1197,6 +1204,7 @@ namespace Spv
CooperativeMatrixKHR = 6022,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
+ FloatControls2 = 6029,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
index 30f2b1d..8ab1923 100644
--- a/include/spirv/unified1/spirv.h
+++ b/include/spirv/unified1/spirv.h
@@ -213,6 +213,7 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
SpvExecutionModeMaximallyReconvergesKHR = 6023,
+ SpvExecutionModeFPFastMathDefault = 6028,
SpvExecutionModeStreamingInterfaceINTEL = 6154,
SpvExecutionModeRegisterMapInterfaceINTEL = 6160,
SpvExecutionModeNamedBarrierCountINTEL = 6417,
@@ -432,8 +433,11 @@ typedef enum SpvFPFastMathModeShift_ {
SpvFPFastMathModeNSZShift = 2,
SpvFPFastMathModeAllowRecipShift = 3,
SpvFPFastMathModeFastShift = 4,
+ SpvFPFastMathModeAllowContractShift = 16,
SpvFPFastMathModeAllowContractFastINTELShift = 16,
+ SpvFPFastMathModeAllowReassocShift = 17,
SpvFPFastMathModeAllowReassocINTELShift = 17,
+ SpvFPFastMathModeAllowTransformShift = 18,
SpvFPFastMathModeMax = 0x7fffffff,
} SpvFPFastMathModeShift;
@@ -444,8 +448,11 @@ typedef enum SpvFPFastMathModeMask_ {
SpvFPFastMathModeNSZMask = 0x00000004,
SpvFPFastMathModeAllowRecipMask = 0x00000008,
SpvFPFastMathModeFastMask = 0x00000010,
+ SpvFPFastMathModeAllowContractMask = 0x00010000,
SpvFPFastMathModeAllowContractFastINTELMask = 0x00010000,
+ SpvFPFastMathModeAllowReassocMask = 0x00020000,
SpvFPFastMathModeAllowReassocINTELMask = 0x00020000,
+ SpvFPFastMathModeAllowTransformMask = 0x00040000,
} SpvFPFastMathModeMask;
typedef enum SpvFPRoundingMode_ {
@@ -1197,6 +1204,7 @@ typedef enum SpvCapability_ {
SpvCapabilityCooperativeMatrixKHR = 6022,
SpvCapabilityBitInstructions = 6025,
SpvCapabilityGroupNonUniformRotateKHR = 6026,
+ SpvCapabilityFloatControls2 = 6029,
SpvCapabilityAtomicFloat32AddEXT = 6033,
SpvCapabilityAtomicFloat64AddEXT = 6034,
SpvCapabilityLongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp
index dafaf46..ee1de78 100644
--- a/include/spirv/unified1/spirv.hpp
+++ b/include/spirv/unified1/spirv.hpp
@@ -209,6 +209,7 @@ enum ExecutionMode {
ExecutionModeNumSIMDWorkitemsINTEL = 5896,
ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
ExecutionModeMaximallyReconvergesKHR = 6023,
+ ExecutionModeFPFastMathDefault = 6028,
ExecutionModeStreamingInterfaceINTEL = 6154,
ExecutionModeRegisterMapInterfaceINTEL = 6160,
ExecutionModeNamedBarrierCountINTEL = 6417,
@@ -428,8 +429,11 @@ enum FPFastMathModeShift {
FPFastMathModeNSZShift = 2,
FPFastMathModeAllowRecipShift = 3,
FPFastMathModeFastShift = 4,
+ FPFastMathModeAllowContractShift = 16,
FPFastMathModeAllowContractFastINTELShift = 16,
+ FPFastMathModeAllowReassocShift = 17,
FPFastMathModeAllowReassocINTELShift = 17,
+ FPFastMathModeAllowTransformShift = 18,
FPFastMathModeMax = 0x7fffffff,
};
@@ -440,8 +444,11 @@ enum FPFastMathModeMask {
FPFastMathModeNSZMask = 0x00000004,
FPFastMathModeAllowRecipMask = 0x00000008,
FPFastMathModeFastMask = 0x00000010,
+ FPFastMathModeAllowContractMask = 0x00010000,
FPFastMathModeAllowContractFastINTELMask = 0x00010000,
+ FPFastMathModeAllowReassocMask = 0x00020000,
FPFastMathModeAllowReassocINTELMask = 0x00020000,
+ FPFastMathModeAllowTransformMask = 0x00040000,
};
enum FPRoundingMode {
@@ -1193,6 +1200,7 @@ enum Capability {
CapabilityCooperativeMatrixKHR = 6022,
CapabilityBitInstructions = 6025,
CapabilityGroupNonUniformRotateKHR = 6026,
+ CapabilityFloatControls2 = 6029,
CapabilityAtomicFloat32AddEXT = 6033,
CapabilityAtomicFloat64AddEXT = 6034,
CapabilityLongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11
index 834b7e9..b287235 100644
--- a/include/spirv/unified1/spirv.hpp11
+++ b/include/spirv/unified1/spirv.hpp11
@@ -209,6 +209,7 @@ enum class ExecutionMode : unsigned {
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
MaximallyReconvergesKHR = 6023,
+ FPFastMathDefault = 6028,
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
@@ -428,8 +429,11 @@ enum class FPFastMathModeShift : unsigned {
NSZ = 2,
AllowRecip = 3,
Fast = 4,
+ AllowContract = 16,
AllowContractFastINTEL = 16,
+ AllowReassoc = 17,
AllowReassocINTEL = 17,
+ AllowTransform = 18,
Max = 0x7fffffff,
};
@@ -440,8 +444,11 @@ enum class FPFastMathModeMask : unsigned {
NSZ = 0x00000004,
AllowRecip = 0x00000008,
Fast = 0x00000010,
+ AllowContract = 0x00010000,
AllowContractFastINTEL = 0x00010000,
+ AllowReassoc = 0x00020000,
AllowReassocINTEL = 0x00020000,
+ AllowTransform = 0x00040000,
};
enum class FPRoundingMode : unsigned {
@@ -1193,6 +1200,7 @@ enum class Capability : unsigned {
CooperativeMatrixKHR = 6022,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
+ FloatControls2 = 6029,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json
index 1283180..be9faa8 100644
--- a/include/spirv/unified1/spirv.json
+++ b/include/spirv/unified1/spirv.json
@@ -228,6 +228,7 @@
"NumSIMDWorkitemsINTEL": 5896,
"SchedulerTargetFmaxMhzINTEL": 5903,
"MaximallyReconvergesKHR": 6023,
+ "FPFastMathDefault": 6028,
"StreamingInterfaceINTEL": 6154,
"RegisterMapInterfaceINTEL": 6160,
"NamedBarrierCountINTEL": 6417
@@ -450,8 +451,11 @@
"NSZ": 2,
"AllowRecip": 3,
"Fast": 4,
+ "AllowContract": 16,
"AllowContractFastINTEL": 16,
- "AllowReassocINTEL": 17
+ "AllowReassoc": 17,
+ "AllowReassocINTEL": 17,
+ "AllowTransform": 18
}
},
{
@@ -1173,6 +1177,7 @@
"CooperativeMatrixKHR": 6022,
"BitInstructions": 6025,
"GroupNonUniformRotateKHR": 6026,
+ "FloatControls2": 6029,
"AtomicFloat32AddEXT": 6033,
"AtomicFloat64AddEXT": 6034,
"LongCompositesINTEL": 6089,
diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua
index fd9c763..b046ee7 100644
--- a/include/spirv/unified1/spirv.lua
+++ b/include/spirv/unified1/spirv.lua
@@ -196,6 +196,7 @@ spv = {
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
MaximallyReconvergesKHR = 6023,
+ FPFastMathDefault = 6028,
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
@@ -406,8 +407,11 @@ spv = {
NSZ = 2,
AllowRecip = 3,
Fast = 4,
+ AllowContract = 16,
AllowContractFastINTEL = 16,
+ AllowReassoc = 17,
AllowReassocINTEL = 17,
+ AllowTransform = 18,
},
FPFastMathModeMask = {
@@ -417,8 +421,11 @@ spv = {
NSZ = 0x00000004,
AllowRecip = 0x00000008,
Fast = 0x00000010,
+ AllowContract = 0x00010000,
AllowContractFastINTEL = 0x00010000,
+ AllowReassoc = 0x00020000,
AllowReassocINTEL = 0x00020000,
+ AllowTransform = 0x00040000,
},
FPRoundingMode = {
@@ -1155,6 +1162,7 @@ spv = {
CooperativeMatrixKHR = 6022,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
+ FloatControls2 = 6029,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py
index 6adad5a..c2aef3c 100644
--- a/include/spirv/unified1/spirv.py
+++ b/include/spirv/unified1/spirv.py
@@ -196,6 +196,7 @@ spv = {
'NumSIMDWorkitemsINTEL' : 5896,
'SchedulerTargetFmaxMhzINTEL' : 5903,
'MaximallyReconvergesKHR' : 6023,
+ 'FPFastMathDefault' : 6028,
'StreamingInterfaceINTEL' : 6154,
'RegisterMapInterfaceINTEL' : 6160,
'NamedBarrierCountINTEL' : 6417,
@@ -406,8 +407,11 @@ spv = {
'NSZ' : 2,
'AllowRecip' : 3,
'Fast' : 4,
+ 'AllowContract' : 16,
'AllowContractFastINTEL' : 16,
+ 'AllowReassoc' : 17,
'AllowReassocINTEL' : 17,
+ 'AllowTransform' : 18,
},
'FPFastMathModeMask' : {
@@ -417,8 +421,11 @@ spv = {
'NSZ' : 0x00000004,
'AllowRecip' : 0x00000008,
'Fast' : 0x00000010,
+ 'AllowContract' : 0x00010000,
'AllowContractFastINTEL' : 0x00010000,
+ 'AllowReassoc' : 0x00020000,
'AllowReassocINTEL' : 0x00020000,
+ 'AllowTransform' : 0x00040000,
},
'FPRoundingMode' : {
@@ -1155,6 +1162,7 @@ spv = {
'CooperativeMatrixKHR' : 6022,
'BitInstructions' : 6025,
'GroupNonUniformRotateKHR' : 6026,
+ 'FloatControls2' : 6029,
'AtomicFloat32AddEXT' : 6033,
'AtomicFloat64AddEXT' : 6034,
'LongCompositesINTEL' : 6089,
diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d
index 150d0b8..0dad05b 100644
--- a/include/spirv/unified1/spv.d
+++ b/include/spirv/unified1/spv.d
@@ -208,6 +208,7 @@ enum ExecutionMode : uint
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
MaximallyReconvergesKHR = 6023,
+ FPFastMathDefault = 6028,
StreamingInterfaceINTEL = 6154,
RegisterMapInterfaceINTEL = 6160,
NamedBarrierCountINTEL = 6417,
@@ -428,8 +429,11 @@ enum FPFastMathModeShift : uint
NSZ = 2,
AllowRecip = 3,
Fast = 4,
+ AllowContract = 16,
AllowContractFastINTEL = 16,
+ AllowReassoc = 17,
AllowReassocINTEL = 17,
+ AllowTransform = 18,
}
enum FPFastMathModeMask : uint
@@ -440,8 +444,11 @@ enum FPFastMathModeMask : uint
NSZ = 0x00000004,
AllowRecip = 0x00000008,
Fast = 0x00000010,
+ AllowContract = 0x00010000,
AllowContractFastINTEL = 0x00010000,
+ AllowReassoc = 0x00020000,
AllowReassocINTEL = 0x00020000,
+ AllowTransform = 0x00040000,
}
enum FPRoundingMode : uint
@@ -1200,6 +1207,7 @@ enum Capability : uint
CooperativeMatrixKHR = 6022,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
+ FloatControls2 = 6029,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongCompositesINTEL = 6089,
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-24 18:54:33 +0000