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authorJames Kang <164518010+majorteach@users.noreply.github.com>2024-03-23 19:42:19 +0800
committerGitHub <noreply@github.com>2024-03-23 19:42:19 +0800
commit0d12bcacd75da8ba02f6294505e7bedd55002a66 (patch)
tree86f423fd0868f06627d745dccdce35426c55bcc5
parent5d9942d13ffda479269edd4e383df9e15c67b80d (diff)
downloadcapstone-0d12bcacd75da8ba02f6294505e7bedd55002a66.tar.gz
Remove repetitive words (#2297)
-rw-r--r--COMPILE_CMAKE.TXT2
-rw-r--r--suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h2
-rw-r--r--suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h2
-rw-r--r--suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h2
-rw-r--r--suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h2
5 files changed, 5 insertions, 5 deletions
diff --git a/COMPILE_CMAKE.TXT b/COMPILE_CMAKE.TXT
index 0a3a36c8..d36bd792 100644
--- a/COMPILE_CMAKE.TXT
+++ b/COMPILE_CMAKE.TXT
@@ -45,7 +45,7 @@ Get CMake for free from http://www.cmake.org.
By default, all architectures are compiled in. If you're building a static library that you intend to link into
multiple consumers, and they have differing architecture requirements, you may want -DCAPSTONE_USE_ARCH_REGISTRATION=1
and call cs_arch_register_*() for the architectures you need in each particular consumer. In this way you only pay
- footprint size for the the architectures you're actually using in each consumer, without having to compile Capstone
+ footprint size for the architectures you're actually using in each consumer, without having to compile Capstone
multiple times.
Besides, Capstone also allows some more customization via following macros.
diff --git a/suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h b/suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h
index f6563971..dbc36888 100644
--- a/suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h
+++ b/suite/synctools/tablegen/include/llvm/CodeGen/CodeGenPassBuilder.h
@@ -295,7 +295,7 @@ protected:
/// all virtual registers.
///
/// Note if the target overloads addRegAssignAndRewriteOptimized, this may not
- /// be honored. This is also not generally used for the the fast variant,
+ /// be honored. This is also not generally used for the fast variant,
/// where the allocation and rewriting are done in one pass.
void addPreRewrite(AddMachinePass &) const {}
diff --git a/suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h b/suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
index 3b2f9373..179f2f07 100644
--- a/suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+++ b/suite/synctools/tablegen/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
@@ -238,7 +238,7 @@ private:
/// needs to be widened to evenly cover \p DstReg, inserts high bits
/// corresponding to the extension opcode \p PadStrategy.
///
- /// \p VRegs will be cleared, and the the result \p NarrowTy register pieces
+ /// \p VRegs will be cleared, and the result \p NarrowTy register pieces
/// will replace it. Returns The complete LCMTy that \p VRegs will cover when
/// merged.
LLT buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,
diff --git a/suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h b/suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h
index 51ffe280..09ae23bb 100644
--- a/suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h
+++ b/suite/synctools/tablegen/include/llvm/CodeGen/LiveInterval.h
@@ -851,7 +851,7 @@ namespace llvm {
/// V2: sub0 sub1 sub2 sub3
/// V1: <offset> sub0 sub1
///
- /// This offset will look like a composed subregidx in the the class:
+ /// This offset will look like a composed subregidx in the class:
/// V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32>
/// => V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32>
///
diff --git a/suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h b/suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h
index 9b13b61f..ff23cffd 100644
--- a/suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h
+++ b/suite/synctools/tablegen/include/llvm/CodeGen/TargetPassConfig.h
@@ -398,7 +398,7 @@ protected:
/// all virtual registers.
///
/// Note if the target overloads addRegAssignAndRewriteOptimized, this may not
- /// be honored. This is also not generally used for the the fast variant,
+ /// be honored. This is also not generally used for the fast variant,
/// where the allocation and rewriting are done in one pass.
virtual bool addPreRewrite() {
return false;