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| author | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2012-07-13 12:07:16 +0100 |
|---|---|---|
| committer | Jon Medhurst <tixy@linaro.org> | 2012-07-19 15:44:58 +0100 |
| commit | d9ccc7d9efc8747a5086671b428566096cc79d63 (patch) | |
| tree | fe5e4602e0635af049e74bc0ebb2cfee1b946de2 | |
| parent | cc759a5949aea1c902265e5dc9433903ae3724fe (diff) | |
| download | vexpress-a9-d9ccc7d9efc8747a5086671b428566096cc79d63.tar.gz | |
ARM: common: add GIC bybass disable on GIC CPU IF save function
When a CPU has to be prepared for shutdown its own GIC CPU IF must
decouple the CPU IRQ line so that it cannot exit wfi when the CPU enters
standby wfi state. In order to carry out this operation, when the GIC
CPU IF is saved, the GIC CPU IF is disabled and IRQ bypass is disabled so
that the CPU IRQ line is forced into a deasserted mode.
This patch is a temporary solution since it might cause issues on system
that requires the GIC CPU IF to stay on when a CPU is shutdown.
Tested on T2 to allow CPU idle deep shutdown sleep states.
| -rw-r--r-- | arch/arm/common/gic.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index d108cc4e542..7fa82240d08 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -590,6 +590,14 @@ static void gic_cpu_save(unsigned int gic_nr) for (i = 0; i < DIV_ROUND_UP(32, 16); i++) ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); + /* + * Disable GIC CPU IF and IRQ bybass. When a CPU is shutdown we must + * insure that it does not exit wfi if an IRQ is pending on the IF. + * The GIC allows this operation by disabling the GIC CPU IF and the + * IRQ bypass mode. The raw IRQ line is still delivered to the power + * controller that use the IRQ to wake up the respective core. + */ + writel_relaxed(0x1e0, cpu_base + GIC_CPU_CTRL); } static void gic_cpu_restore(unsigned int gic_nr) |