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| author | Abhishek Barman <quic_abarman@quicinc.com> | 2023-02-14 19:22:14 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2023-03-06 02:59:07 -0800 |
| commit | 37cbee3a0328d8982157398349fd52a41686a6c7 (patch) | |
| tree | 7c9dda20f70006378e37be062b3d8457b54480bf | |
| parent | 56f897d61e54c87bee2b887a0bec280127382fb4 (diff) | |
| download | graphics-37cbee3a0328d8982157398349fd52a41686a6c7.tar.gz | |
msm: kgsl: Set KGSL_MMU_SUPPORT_VBO feature at probe time
Set KGSL_MMU_SUPPORT_VBO feature at probe time.
PRR registers are not supported in A650 through HLOS.
Thus, disable this feature for A650 target.
Change-Id: Ied897f4cff4de1cd361e63d5df6ed3a80444fe01
Signed-off-by: Abhishek Barman <quic_abarman@quicinc.com>
| -rw-r--r-- | adreno.c | 7 | ||||
| -rw-r--r-- | kgsl_iommu.c | 7 |
2 files changed, 11 insertions, 3 deletions
@@ -1271,6 +1271,13 @@ int adreno_device_probe(struct platform_device *pdev, if (ADRENO_FEATURE(adreno_dev, ADRENO_IOCOHERENT)) kgsl_mmu_set_feature(device, KGSL_MMU_IO_COHERENT); + /* + * Support VBOs on hardware where HLOS has access to PRR registers + * configuration. + */ + if (!adreno_is_a650(adreno_dev)) + kgsl_mmu_set_feature(device, KGSL_MMU_SUPPORT_VBO); + if (adreno_preemption_enable) adreno_dev->preempt_override = true; diff --git a/kgsl_iommu.c b/kgsl_iommu.c index d62626a..adf3398 100644 --- a/kgsl_iommu.c +++ b/kgsl_iommu.c @@ -2495,7 +2495,8 @@ int kgsl_iommu_probe(struct kgsl_device *device) * Only support VBOs on MMU500 hardware that supports the PRR * marker register to ignore writes to the zero page */ - if (mmu->subtype == KGSL_IOMMU_SMMU_V500) { + if ((mmu->subtype == KGSL_IOMMU_SMMU_V500) && + test_bit(KGSL_MMU_SUPPORT_VBO, &mmu->features)) { /* * We need to allocate a page because we need a known physical * address to program in the PRR register but the hardware @@ -2504,9 +2505,9 @@ int kgsl_iommu_probe(struct kgsl_device *device) */ kgsl_vbo_zero_page = alloc_page(GFP_KERNEL | __GFP_ZERO | __GFP_NORETRY | __GFP_HIGHMEM); - if (kgsl_vbo_zero_page) - set_bit(KGSL_MMU_SUPPORT_VBO, &mmu->features); } + if (!kgsl_vbo_zero_page) + clear_bit(KGSL_MMU_SUPPORT_VBO, &mmu->features); return 0; |