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path: root/display/monaco-sde-display.dtsi
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#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/mdss-5nm-pll-clk.h>
#include "dsi-panel-rm69090-amoled-178-cmd.dtsi"
#include "dsi-panel-rm69090-amoled-178-vid.dtsi"
#include "dsi-panel-rm6d030-amoled-141-cmd.dtsi"

&soc {
	dsi_panel_pwr_supply: dsi_panel_pwr_supply {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <2000000>;
			qcom,supply-enable-load = <4000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-ulp-load = <100>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "lab";
			qcom,supply-min-voltage = <4600000>;
			qcom,supply-max-voltage = <6000000>;
			qcom,supply-enable-load = <100000>;
			qcom,supply-disable-load = <100>;
		};

		qcom,panel-supply-entry@2 {
			reg = <2>;
			qcom,supply-name = "ibb";
			qcom,supply-min-voltage = <4600000>;
			qcom,supply-max-voltage = <6000000>;
			qcom,supply-enable-load = <100000>;
			qcom,supply-disable-load = <100>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	dsi_panel_pwr_supply_no_labibb: dsi_panel_pwr_supply_no_labibb {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <2000000>;
			qcom,supply-enable-load = <4000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-ulp-load = <100>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	dsi_panel_pwr_supply_labibb_amoled: dsi_panel_pwr_supply_labibb_amoled {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <2000000>;
			qcom,supply-enable-load = <4000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-ulp-load = <100>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "vdda-3p3";
			qcom,supply-min-voltage = <3000000>;
			qcom,supply-max-voltage = <3000000>;
			qcom,supply-enable-load = <13200>;
			qcom,supply-disable-load = <80>;
		};
	};

	dsi_panel_pwr_supply_nolab_amoled: dsi_panel_pwr_supply_nolab_amoled {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,panel-supply-entry@0 {
			reg = <0>;
			qcom,supply-name = "vddio";
			qcom,supply-min-voltage = <1800000>;
			qcom,supply-max-voltage = <2000000>;
			qcom,supply-enable-load = <62000>;
			qcom,supply-disable-load = <80>;
			qcom,supply-post-on-sleep = <20>;
		};

		qcom,panel-supply-entry@1 {
			reg = <1>;
			qcom,supply-name = "ibb";
			qcom,supply-min-voltage = <4600000>;
			qcom,supply-max-voltage = <6000000>;
			qcom,supply-enable-load = <0>;
			qcom,supply-disable-load = <0>;
			qcom,supply-post-on-sleep = <20>;
		};
	};

	display_panel_ibb: display_panel_ibb_stub {
		compatible = "qcom,stub-regulator";
		regulator-name = "display_panel_ibb";
		regulator-min-microvolt = <4600000>;
		regulator-max-microvolt = <6000000>;
	};

	sde_dsi: qcom,dsi-display-primary {
		compatible = "qcom,dsi-display";
		label = "primary";
		qcom,dsi-ctrl = <&mdss_dsi0>;
		qcom,dsi-phy = <&mdss_dsi_phy0>;

		clocks = <&mdss_dsi_phy0 BYTECLK_MUX_0_CLK>,
			 <&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
			 <&mdss_dsi_phy0 CPHY_BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 CPHY_PCLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 PCLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 SHADOW_BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 SHADOW_PCLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 SHADOW_CPHY_BYTECLK_SRC_0_CLK>,
			 <&mdss_dsi_phy0 SHADOW_CPHY_PCLK_SRC_0_CLK>,
			 <&rpmcc RPM_SMD_XO_CLK_SRC>,
			 <&rpmcc RPM_SMD_XO_CLK_SRC>;
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
			"cphy_byte_clk0", "cphy_pixel_clk0",
			"src_byte_clk0", "src_pixel_clk0",
			"shadow_byte_clk0", "shadow_pixel_clk0",
			"shadow_cphybyte_clk0", "shadow_cphypixel_clk0",
			"xo_byte_clk0", "xo_pixel_clk0";
		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;

		qcom,platform-te-gpio = <&tlmm 73 0>;
		qcom,panel-te-source = <0>;
		vddio-supply = <&L21A>;
		ibb-supply = <&display_panel_ibb>;
		qcom,mdp = <&mdss_mdp>;

		qcom,dsi-default-panel =
			<&dsi_rm69090_amoled_cmd>;
	};
};

&mdss_mdp {
	  connectors = <&smmu_sde_unsec &sde_dsi>;
};

&dsi_rm69090_amoled_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-t-clk-post = <0x08>;
	qcom,mdss-dsi-t-clk-pre = <0x0B>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0",
				"xo_byte_clk0", "xo_pixel_clk0";

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
	qcom,mdss-dsi-panel-status-value = <0x9c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;

	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 0C 03 03 10 1D 03
				03 03 02 02 04 0B 08];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_rm69090_amoled_vid {
	qcom,ulps-enabled;
	qcom,mdss-dsi-t-clk-post = <0x07>;
	qcom,mdss-dsi-t-clk-pre = <0x09>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0",
				"xo_byte_clk0", "xo_pixel_clk0";

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
	qcom,mdss-dsi-panel-status-value = <0x9c>;
	qcom,mdss-dsi-panel-status-read-length = <1>;
	qcom,esd-check-enabled;

	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 0A 01 02 0E 1B 02
				02 02 01 02 04 09 07];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};

&dsi_rm6d030_amoled_cmd {
	qcom,ulps-enabled;
	qcom,mdss-dsi-t-clk-post = <0x07>;
	qcom,mdss-dsi-t-clk-pre = <0x0A>;
	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
				"src_byte_clk0", "src_pixel_clk0",
				"shadow_byte_clk0", "shadow_pixel_clk0",
				"xo_byte_clk0", "xo_pixel_clk0";

	qcom,mdss-dsi-display-timings {
		timing@0 {
			qcom,mdss-dsi-panel-phy-timings = [00 0A 02 02 0F 1D 02
				02 02 02 02 04 0A 07];
			qcom,display-topology = <1 0 1>;
			qcom,default-topology-index = <0>;
		};
	};
};