diff options
28 files changed, 521 insertions, 83 deletions
@@ -1,2 +1,6 @@ # Ignore camera directory qcom/camera + +# Ignore display directory and soft link +qcom/display +bindings/display/qcom diff --git a/bindings/connector/usb-connector.txt b/bindings/connector/usb-connector.txt index 8855bfcf..a9a2f2fc 100644 --- a/bindings/connector/usb-connector.txt +++ b/bindings/connector/usb-connector.txt @@ -14,6 +14,8 @@ Optional properties: - label: symbolic name for the connector, - type: size of the connector, should be specified in case of USB-A, USB-B non-fullsize connectors: "mini", "micro". +- self-powered: Set this property if the usb device that has its own power + source. Optional properties for usb-c-connector: - power-role: should be one of "source", "sink" or "dual"(DRP) if typec @@ -29,15 +31,15 @@ Required properties for usb-c-connector with power delivery support: in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2 Source_Capabilities Message, the order of each entry(PDO) should follow the PD spec chapter 6.4.1. Required for power source and power dual role. - User can specify the source PDO array via PDO_FIXED/BATT/VAR() defined in - dt-bindings/usb/pd.h. + User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() + defined in dt-bindings/usb/pd.h. - sink-pdos: An array of u32 with each entry providing supported power sink data object(PDO), the detailed bit definitions of PDO can be found in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3 Sink Capabilities Message, the order of each entry(PDO) should follow the PD spec chapter 6.4.1. Required for power sink and power dual role. - User can specify the sink PDO array via PDO_FIXED/BATT/VAR() defined in - dt-bindings/usb/pd.h. + User can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined + in dt-bindings/usb/pd.h. - op-sink-microwatt: Sink required operating power in microwatt, if source can't offer the power, Capability Mismatch is set. Required for power sink and power dual role. diff --git a/bindings/display/msm/google-bl.txt b/bindings/display/msm/google-bl.txt new file mode 100644 index 00000000..d98a869a --- /dev/null +++ b/bindings/display/msm/google-bl.txt @@ -0,0 +1,173 @@ +Google binned low power mode panel + +This is an extension of QTI's mdss-dsi-panel to handle additional command +sequences for low power modes. + +Required properties: +- compatible: "google,dsi_binned_lp" + + +============================================================== + +Google low power display modes + +Required properties: +- compatible: "google,lp-modes" +- label: Name of the entry +- dsi-lp-brightness-threshold: + Max brightness supported by the mode +- dsi-lp-command: Command sequence to enter this mode +- dsi-lp-command-state: Command state used in this mode + +Example: + +/ { + ... + google,lp-modes { + lp-mode@0 { + label = "off"; + google,dsi-lp-brightness-threshold = <0>; + google,dsi-lp-command = [ + 05 01 00 00 00 00 01 22 + ]; + google,dsi-lp-command-state = "dsi_lp_mode"; + }; + + lp-mode@1 { + label = "high"; + google,dsi-lp-brightness-threshold = <255>; + google,dsi-lp-command = [ + 39 01 00 00 00 00 03 51 01 FF + 05 01 00 00 00 00 01 12 + ]; + google,dsi-lp-command-state = "dsi_lp_mode"; + }; +}; + +============================================================== +Google binned panel feature + +This is an extension of QTI's mdss-dsi-panel to handle additional panel +feature. + +Properties: +- google,dsi-panel-dimming-enable: a boolean property. If present, + panel dimming feature is always-on. + +============================================================== + +Google high brightness display mode + +This is an extension of QTI's mdss-dsi-panel to handle special display modes +that allow for exceptionally high brightness. + +High brightness mode (HBM) is specified through 1 or more user brightness +ranges. Conceptually, Each HBM range contains, +1) User brightness threshold +2) Panel brightness range +3) DSI command (optional) + +HBM ranges must be sorted by brightness threshold and not overlap. +An HBM range covers user brightness levels starting from the threshold, up to +but not including the next HBM mode's threshold. +The last HBM range covers user brightness levels starting from its threshold, +up to and including qcom,mdss-brightness-max-level. + +When user brightness is updated, the appropriate HBM range is selected and the +corresponding DSI command, if present, is sent to the panel. Then the user's +brightness is linearly mapped to the panel's brightness range and the panel is +updated if needed. + +Note that there is currently no support for backlight LUTs during HBM mode. + +HBM support also includes optional brightness dimming support. Brightness +dimming refers to some panels' ability to gradually change brightness over +time, smoothing the transition between current brightness and the latest +brightness level requested by the host. The driver uses this feature, if +supported by the panel, to smooth brightness changes as HBM is enabled, changes +ranges, or disabled. +To implement this support, +1) HBM range entry sequences (dsi-hbm-range-entry-command) or exit sequences +(dsi-hbm-exit-command) will include commands necessary to enable brightness +dimming +2) The corresponding HBM node will specify the number of frames dimming is +expected to last on the panel side +3) The same node will specify a command to send to the panel at the end of the +brightness dimming duration, to disable brightness dimming. + +HBM uses the following properties. Each property is required, unless specified +as optional: +- google,hbm-ranges: Parent list of HBM ranges. +- hbm-range@n: An HBM range, starting at n=0. +- dsi-hbm-exit-command: Optional command sequence to exit HBM. +- dsi-hbm-commands-state: Optional command state used for HBM commands. +- dsi-hbm-exit-num-dimming-frames: Optional number of frames indicating + brightness dimming duration. Mandatory if dsi-hbm-exit-dimming-stop-command + is specified. +- dsi-hbm-exit-dimming-stop-command: Optional command to send at the end of the + brightness dimming duration, to disable dimming. Mandatory if + dsi-hbm-exit-num-dimming-frames is specified. +- dsi-irc-addr: Optional register address to control IRC. +- dsi-irc-bit-offset: Optional IRC bit offset. +- dsi-irc-unlock-command: Optional command to unlock panel IRC. +- dsi-irc-unlock-commands-state: Optional command state to unlock panel IRC. +- dsi-irc-lock-command: Optional command to lock panel IRC. +- dsi-irc-lock-commands-state: Optional command state to lock panel IRC + +Each hbm-range@n contains the following properties. Each property is required, +unless specified as optional: +- dsi-hbm-range-brightness-threshold: Starting user brightness for this HBM + range. +- dsi-hbm-range-entry-command: Optional command sequence to enter this range. +- dsi-hbm-range-commands-state: Optional command state used in this range. +- dsi-hbm-range-bl-min-level: Start of panel brightness range + (inclusive). +- dsi-hbm-range-bl-max-level: End of panel brightness range (inclusive). +- dsi-hbm-range-num-dimming-frames: Optional. Analogous to + dsi-hbm-exit-num-dimming-frames, but for a given HBM range. +- dsi-hbm-range-dimming-stop-command: Optional. Analogous to + dsi-hbm-exit-dimming-stop-command, but for a given HBM range. + +Example: + +/ { + ... + google,hbm-ranges { + google,dsi-hbm-exit-command = [ + 15 01 00 00 00 00 02 53 20 + ]; + google,dsi-hbm-commands-state = "dsi_lp_mode"; + + google,dsi-irc-addr = <0xBE>; + google,dsi-irc-bit-offset = <21>; + google,dsi-irc-unlock-command = [ + 39 01 00 00 00 00 03 F0 5A 5A + ]; + google,dsi-irc-unlock-commands-state = "dsi_lp_mode"; + google,dsi-irc-lock-command = [ + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + google,dsi-irc-lock-commands-state = "dsi_lp_mode"; + + hbm-range@0 { + google,dsi-hbm-range-brightness-threshold = <1>; + + google,dsi-hbm-range-bl-min-level = <0x5>; + google,dsi-hbm-range-bl-max-level = <0x3ff>; + google,dsi-hbm-range-entry-command = [ + 15 01 00 00 00 00 02 53 20 + ]; + google,dsi-hbm-range-commands-state = "dsi_lp_mode"; + }; + + hbm-range@1 { + google,dsi-hbm-range-brightness-threshold = <170>; + + google,dsi-hbm-range-bl-min-level = <0x3ff>; + google,dsi-hbm-range-bl-max-level = <0x3ff>; + google,dsi-hbm-range-entry-command = [ + 15 01 00 00 00 00 02 53 E0 + ]; + google,dsi-hbm-range-commands-state = "dsi_lp_mode"; + }; + }; diff --git a/bindings/display/msm/mdss-dsi-panel.txt b/bindings/display/msm/mdss-dsi-panel.txt index 072a3021..97c4c95c 100644 --- a/bindings/display/msm/mdss-dsi-panel.txt +++ b/bindings/display/msm/mdss-dsi-panel.txt @@ -440,6 +440,20 @@ Optional properties: height values. This property is specified per timing node to support resolution's alignment restrictions. - qcom,esd-check-enabled: Boolean used to enable ESD recovery feature. +- google,mdss-dsi-te2-info An array that lists the + sequence of rising edge value and falling edge value of TE2 signals. + Each command will have the format defined + as below: + sequence 1: <90HZ_rising_edge 90HZ_falling_edge> + sequence 2: <60HZ_rising_edge 60HZ_falling_edge> + sequence 3: <LP_HIGH_rising_edge LP_HIGH_falling_edge> + sequence 4: <LP_LOW_rising_edge LP_LOW_falling_edge> + Example: + google,mdss-dsi-te2-info = <1978 1980>, //90HZ + <1978 1980>, //60HZ + <1978 1980>, //LP_HIGH + <1978 1980>; //LP_LOW +- google,mdss-dsi-te2-lp-threshold The value is used to seperate TE2_EDGE_LP_HIGH and TE2_EDGE_LP_LOW. - qcom,mdss-dsi-panel-status-command: A byte stream formed by multiple dcs packets based on qcom dsi controller protocol, to read the panel status. This value is used to kick in the ESD recovery. @@ -574,6 +588,11 @@ Optional properties: display. The first set is indexed by the value 0. - qcom,mdss-dsi-ext-bridge-mode: External bridge chip is connected instead of panel. +- google,mdss-dsi-panel-vendor-extinfo-loc: Extended panel information read from a sequence of DSI registers. + Each register in the sequence is specified by a set of three values: + - address of register + - start byte of the data read from the register + - total number of bytes to read - qcom,mdss-dsi-dma-schedule-line: An integer value indicates the line number after vertical active region, at which command DMA needs to be triggered. diff --git a/bindings/display/qcom b/bindings/display/qcom new file mode 120000 index 00000000..2bff26e7 --- /dev/null +++ b/bindings/display/qcom @@ -0,0 +1 @@ +../../qcom/display/bindings
\ No newline at end of file diff --git a/bindings/misc/access_ramoops.txt b/bindings/misc/access_ramoops.txt new file mode 100644 index 00000000..16cf0c55 --- /dev/null +++ b/bindings/misc/access_ramoops.txt @@ -0,0 +1,13 @@ +access_ramoops driver +===================== + +The access_ramoops driver allows userspace access to the persistent RAM storage +used for oops and panics as well as the metadata required to decrypt that data. + +Required properties: + +- compatible: must be "access_ramoops" + +- memory-region: phandle to a region of memory that is preserved between reboots + +- label: name of the region, will be used to create the device node /dev/<label> diff --git a/bindings/pinctrl/qcom,lito-pinctrl.txt b/bindings/pinctrl/qcom,lito-pinctrl.txt index c7acea32..aa9ff9dc 100644 --- a/bindings/pinctrl/qcom,lito-pinctrl.txt +++ b/bindings/pinctrl/qcom,lito-pinctrl.txt @@ -45,6 +45,13 @@ LITO platform. Value type: <phandle> Definition: A phandle to the wakeup interrupt controller for the SoC. +- goog,ignored-gpios: + Usage: optional + Value type: <prop-encoded-array> + Definition: List of gpio numbers should be ignored by the driver. It might + be useful if this gpio mmio is unmapped from Linux kernel address space + and that addresses should never be accessed. + Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for a general description of GPIO and interrupt bindings. diff --git a/bindings/power/reset/msm-poweroff.txt b/bindings/power/reset/msm-poweroff.txt index 1492616e..8ef76d68 100644 --- a/bindings/power/reset/msm-poweroff.txt +++ b/bindings/power/reset/msm-poweroff.txt @@ -1,21 +1,19 @@ MSM Restart Driver - A power supply hold (ps-hold) bit is set to power the msm chipsets. Clearing that bit allows us to restart/poweroff. The difference between poweroff and restart is determined by unique power manager IC settings. - Required Properties: -compatible: "qcom,pshold" -reg: Specifies the physical address of the ps-hold register - Optional Properties: -qcom,force-warm-reboot: Issue a warm reboot, even for the traditional cases where hard reboot is issued. - +-qcom,force-warm-reboot-on-thermal-shutdown: Issue a warm reboot on + "shutdown,thermal" restart reason. Example: - restart@fc4ab000 { compatible = "qcom,pshold"; reg = <0xfc4ab000 0x4>; }; + diff --git a/bindings/regulator/tps-regulator.txt b/bindings/regulator/tps-regulator.txt new file mode 100644 index 00000000..ee157fa6 --- /dev/null +++ b/bindings/regulator/tps-regulator.txt @@ -0,0 +1,69 @@ +TPS voltage regulators + +Required properties: +- compatible: Must be "regulator-tps". +- voltage-count: The number of configs used by the voltage selectors. Must be + 1 or 2. +- regulator-min-microvolt: The minimum output voltage. +- regulator-max-microvolt: The maximum output voltage. +- en-gpios: The phandle for the enable gpio +- en-delay: Delay in microseconds, if any, after turning on enable gpio. 0 if no + delay. +- dis-delay: Delay in microseconds, if any, before turning off enable gpio. 0 if + no delay. + +Optional properties: +- en-pin-only: Set this property if only one gpio (enable gpio) is needed. Any + sub-node will be ignored. The regulator will be a fixed voltage regulator + where the output voltage is the value of regulator-min-microvolt. + +Required properties of the sub-nodes: +- voltage-level-uv: Must be 5000000 or 7000000. +- control-gpio-count: the number of gpios involved in controlling the + regulator. +- control-gpios: list of phandles for the control gpio. +- gpio-enable-sequence - gpio indexes for enabling the regulator. +- gpio-enable-delay - delays in microseconds, if any, after turning on + each gpio in gpio-enable-sequence. 0 if no delay. +- gpio-disable-sequence - gpio indexes for disabling the regulator. +- gpio-disable-delay - delays in microseconds, if any, after turning off + each gpio in gpio-disable-sequence. 0 if no delay. + +Any property defined as part of the core regulator +binding, defined in regulator.txt, can also be used. +However a fixed voltage regulator is expected to have the +regulator-min-microvolt and regulator-max-microvolt +to be the same. + +Example: + regulator@00{ + compatible = "regulator-tps"; + regulator-name = "ext_boost"; + voltage-count = <2>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <7000000>; + en-gpios = <&pm8150_gpios 8 GPIO_ACTIVE_HIGH>; + en-delay = <1000>; + dis-delay = <0>; + status = "okay"; + + usb_5v { + voltage-level-uv = <5000000>; + control-gpio-count = <1>; + control-gpios = <&tlmm 93 GPIO_ACTIVE_HIGH>; + gpio-enable-sequence = <1>; + gpio-enable-delay = <0>; + gpio-disable-sequence = <1>; + gpio-disable-delay = <0>; + }; + + rtx_7v { + voltage-level-uv = <7000000>; + control-gpio-count = <1>; + control-gpios = <&tlmm 90 GPIO_ACTIVE_HIGH>; + gpio-enable-sequence = <1>; + gpio-enable-delay = <0>; + gpio-disable-sequence = <1>; + gpio-disable-delay = <0>; + }; + }; diff --git a/bindings/reserved-memory/ramoops.txt b/bindings/reserved-memory/ramoops.txt index 0eba562f..efa1b487 100644 --- a/bindings/reserved-memory/ramoops.txt +++ b/bindings/reserved-memory/ramoops.txt @@ -22,7 +22,11 @@ Required properties: - compatible: must be "ramoops" -- reg: region of memory that is preserved between reboots +- memory-region: region of memory that is preserved between reboots +- alt-memory-region: region of memory that is preserved between reboots + which contains an AES encrypted copy of the persistent + RAM storage. + Optional properties: diff --git a/qcom/Makefile b/qcom/Makefile index e355e053..0113e6ae 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -1,3 +1,5 @@ +ifeq (,$(filter y, $(CONFIG_BOARD_BRAMBLE) $(CONFIG_BOARD_REDFIN) $(CONFIG_BOARD_BARBET))) + ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_KONA) += \ kona-cdp-overlay.dtbo \ @@ -510,6 +512,7 @@ dtb-$(CONFIG_ARCH_SDM429) += sdm429-mtp.dtb \ sda429-mtp.dtb \ sda429-cdp.dtb endif +endif #CONFIG_BOARD_BRAMBLE CONFIG_BOARD_REDFIN CONFIG_BOARD_BARBET always := $(dtb-y) subdir-y := $(dts-dirs) diff --git a/qcom/kona-bus.dtsi b/qcom/kona-bus.dtsi index a7306484..4eeebe5a 100644 --- a/qcom/kona-bus.dtsi +++ b/qcom/kona-bus.dtsi @@ -21,6 +21,8 @@ "mmss_noc-base", "system_noc-base", "ipa_virt-base", "compute_noc-base", "npu_noc-base"; + clocks = <&clock_gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; + /*RSCs*/ rsc_apps: rsc-apps { cell-id = <MSM_BUS_RSC_APPS>; diff --git a/qcom/kona-regulators.dtsi b/qcom/kona-regulators.dtsi index 528403c6..7e6cca25 100644 --- a/qcom/kona-regulators.dtsi +++ b/qcom/kona-regulators.dtsi @@ -6,8 +6,6 @@ rpmh-regulator-mxlvl { compatible = "qcom,rpmh-arc-regulator"; qcom,resource-name = "mx.lvl"; - pm8150a_s3_mmcx_sup_level-parent-supply = - <&VDD_CX_MMCX_SUPPLY_LEVEL>; VDD_MX_LEVEL: S3C_LEVEL: pm8150a_s3_level: regulator-pm8150a-s3-level { @@ -35,6 +33,8 @@ VDD_MX_MMCX_SUPPLY_LEVEL: regulator-pm8150a-s3-mmcx-sup-level { regulator-name = "pm8150a_s3_mmcx_sup_level"; + pm8150a_s3_mmcx_sup_level-parent-supply = + <&VDD_CX_MMCX_SUPPLY_LEVEL>; qcom,set = <RPMH_REGULATOR_SET_ALL>; regulator-min-microvolt = <RPMH_REGULATOR_LEVEL_RETENTION>; diff --git a/qcom/kona-sde-pll.dtsi b/qcom/kona-sde-pll.dtsi index 0484c59c..5d1f5e45 100644 --- a/qcom/kona-sde-pll.dtsi +++ b/qcom/kona-sde-pll.dtsi @@ -16,6 +16,7 @@ memory-region = <&dfps_data_memory>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; + qcom,msm-bus,name = "dsi_pll_7nm_v4_1_0"; }; mdss_dsi1_pll: qcom,mdss_dsi_pll@ae96900 { @@ -34,6 +35,7 @@ clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; + qcom,msm-bus,name = "dsi_pll_7nm_v4_1_1"; }; mdss_dp_pll: qcom,mdss_dp_pll@c011000 { @@ -63,5 +65,6 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "pipe_clk"; clock-rate = <0>; + qcom,msm-bus,name = "dp_pll_7nm"; }; }; diff --git a/qcom/kona-sde.dtsi b/qcom/kona-sde.dtsi index 7046282d..cc4416d2 100644 --- a/qcom/kona-sde.dtsi +++ b/qcom/kona-sde.dtsi @@ -349,6 +349,8 @@ vdda-1p2-supply = <&pm8150_l9>; vdda-0p9-supply = <&pm8150_l18>; + vddio-supply = <&pm8150_l14>; + vdd-supply = <&pm8150a_l11>; reg = <0xae90000 0x0dc>, <0xae90200 0x0c0>, diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi index 87088d7a..479a0a53 100644 --- a/qcom/kona.dtsi +++ b/qcom/kona.dtsi @@ -2464,6 +2464,8 @@ vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_cx_ao-supply = <&VDD_CX_LEVEL_AO>; vdd_mm-supply = <&VDD_MMCX_LEVEL>; + ufs-supply = <&ufs_phy_gdsc>; + usb30-supply = <&usb30_prim_gdsc>; #clock-cells = <1>; #reset-cells = <1>; }; @@ -2520,6 +2522,7 @@ reg-names = "cc_base"; vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_mx-supply = <&VDD_MX_LEVEL>; + gdsc_cx-supply = <&gpu_cx_gdsc>; #clock-cells = <1>; #reset-cells = <1>; }; @@ -2583,6 +2586,8 @@ regulator-name = "ufs_phy_gdsc"; qcom,retain-regs; qcom,gds-timeout = <500>; + proxy-supply = <&ufs_phy_gdsc>; + qcom,proxy-consumer-enable; }; usb30_prim_gdsc: qcom,gdsc@10f004 { @@ -2590,6 +2595,8 @@ reg = <0x10f004 0x4>; regulator-name = "usb30_prim_gdsc"; qcom,retain-regs; + proxy-supply = <&usb30_prim_gdsc>; + qcom,proxy-consumer-enable; }; usb30_sec_gdsc: qcom,gdsc@110004 { @@ -2775,6 +2782,8 @@ qcom,clk-dis-wait-val = <8>; qcom,gds-timeout = <500>; qcom,retain-regs; + proxy-supply = <&gpu_cx_gdsc>; + qcom,proxy-consumer-enable; }; gpu_gx_domain_addr: syscon@3d91508 { diff --git a/qcom/lito-bus.dtsi b/qcom/lito-bus.dtsi index b361373b..36888848 100644 --- a/qcom/lito-bus.dtsi +++ b/qcom/lito-bus.dtsi @@ -25,6 +25,8 @@ "npu_noc-base", "camnoc_virt-base", "qup_virt-base"; + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>; + /*RSCs*/ rsc_apps: rsc-apps { cell-id = <MSM_BUS_RSC_APPS>; diff --git a/qcom/lito-coresight.dtsi b/qcom/lito-coresight.dtsi index 8edd5267..915f2c7d 100644 --- a/qcom/lito-coresight.dtsi +++ b/qcom/lito-coresight.dtsi @@ -208,6 +208,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -253,6 +254,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_swao0_out_tpda_swao: endpoint { @@ -271,6 +273,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,msr-fix-req; @@ -374,6 +377,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; nvmem-cells = <&stm_debug_fuse>; nvmem-cell-names = "debug_fuse"; @@ -466,6 +470,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -541,6 +546,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -738,6 +744,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_dcc_out_tpda: endpoint { @@ -756,6 +763,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_vsense_out_tpda: endpoint { @@ -774,6 +782,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_prng_out_tpda: endpoint { @@ -792,6 +801,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_pimem_out_tpda: endpoint { @@ -810,6 +820,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_qm_out_tpda: endpoint { @@ -829,6 +840,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1034,6 +1046,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_dlct_out_funnel_dl_center: endpoint { @@ -1053,6 +1066,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_ipcc_out_funnel_dl_center: endpoint { @@ -1074,6 +1088,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; @@ -1107,6 +1122,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_nav_out_tpda_nav0: endpoint { remote-endpoint = @@ -1126,6 +1142,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1178,6 +1195,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,msr-fix-req; @@ -1199,6 +1217,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_llm_turing_out_funnel_turing: endpoint { @@ -1233,6 +1252,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1303,6 +1323,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_compute0_out_funnel_dl_compute: endpoint { @@ -1322,6 +1343,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_compute1_out_funnel_dl_compute: endpoint { @@ -1342,6 +1364,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_npu_out_funnel_npu: endpoint { @@ -1369,6 +1392,7 @@ <&npucc NPU_CC_LLM_CURR_CLK>, <&npucc NPU_CC_LLM_TEMP_CLK>, <&npucc NPU_CC_LLM_XO_CLK>; + status = "disabled"; clock-names = "apb_pclk", "npu_axi_clk", @@ -1417,6 +1441,7 @@ <&npucc NPU_CC_DPM_CLK>, <&npucc NPU_CC_DPM_TEMP_CLK>, <&npucc NPU_CC_DPM_XO_CLK>; + status = "disabled"; clock-names = "apb_pclk", "dl_dpm_clk", @@ -1453,6 +1478,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1529,6 +1555,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1563,6 +1590,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,msr-fix-req; @@ -1584,6 +1612,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1639,6 +1668,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_mdss_out_funnel_dl_center: endpoint { @@ -1659,6 +1689,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1693,6 +1724,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_dl_mm_out_funnel_dl_mm: endpoint { @@ -1822,6 +1854,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1889,6 +1922,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -1926,6 +1960,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,duplicate-funnel; ports { @@ -2002,6 +2037,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -2044,6 +2080,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,msr-fix-req; @@ -2085,6 +2122,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; qcom,msr-fix-req; @@ -2179,6 +2217,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -2212,6 +2251,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_olc_out_tpda_olc: endpoint { @@ -2233,6 +2273,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -2266,6 +2307,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_apss_out_tpda_apss: endpoint { @@ -2287,6 +2329,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -2320,6 +2363,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_llm_silver_out_tpda_llm_silver: endpoint { @@ -2342,6 +2386,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; ports { #address-cells = <1>; @@ -2375,6 +2420,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; port { tpdm_llm_gold_out_tpda_llm_gold: endpoint { @@ -2495,6 +2541,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm0_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm0>; @@ -2515,6 +2563,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm1_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm1>; @@ -2535,6 +2585,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm2_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm2>; @@ -2555,6 +2607,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm3_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm3>; @@ -2575,6 +2629,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm4_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm4>; @@ -2595,6 +2651,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm5_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm5>; @@ -2615,6 +2673,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm6_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm6>; @@ -2635,6 +2695,8 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; + port { etm7_out_funnel_apss: endpoint { remote-endpoint = <&funnel_apss_in_etm7>; @@ -2652,6 +2714,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_apss: cti@78f0000 { @@ -2664,6 +2727,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti2_apss: cti@7900000 { @@ -2676,6 +2740,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_iris: cti@6830000 { @@ -2688,6 +2753,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0: cti@6010000 { @@ -2700,7 +2766,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti1: cti@6011000 { @@ -2713,7 +2779,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti2: cti@6012000 { @@ -2730,6 +2796,7 @@ qcom,cti-gpio-trigout = <4>; pinctrl-names = "cti-trigout-pctrl"; pinctrl-0 = <&trigout_a>; + status = "disabled"; }; cti3: cti@6013000 { @@ -2742,7 +2809,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti4: cti@6014000 { @@ -2755,7 +2822,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti5: cti@6015000 { @@ -2768,7 +2835,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti6: cti@6016000 { @@ -2781,7 +2848,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti7: cti@6017000 { @@ -2794,7 +2861,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti8: cti@6018000 { @@ -2807,7 +2874,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti9: cti@6019000 { @@ -2820,7 +2887,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti10: cti@601a000 { @@ -2833,7 +2900,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti11: cti@601b000 { @@ -2846,7 +2913,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti12: cti@601c000 { @@ -2859,7 +2926,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti13: cti@601d000 { @@ -2872,7 +2939,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti14: cti@601e000 { @@ -2885,7 +2952,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti15: cti@601f000 { @@ -2898,7 +2965,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti_cpu0: cti@7020000 { @@ -2912,7 +2979,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; - + status = "disabled"; }; cti_cpu1: cti@7120000 { @@ -2926,6 +2993,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu2: cti@7220000 { @@ -2939,6 +3007,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu3: cti@7320000 { @@ -2952,6 +3021,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu4: cti@7420000 { @@ -2965,6 +3035,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu5: cti@7520000 { @@ -2978,6 +3049,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu6: cti@7620000 { @@ -2991,6 +3063,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_cpu7: cti@7720000 { @@ -3004,6 +3077,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_swao:cti@6b00000 { @@ -3016,6 +3090,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_swao:cti@6b01000 { @@ -3028,6 +3103,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti2_swao:cti@6b02000 { @@ -3040,6 +3116,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti3_swao:cti@6b03000 { @@ -3052,6 +3129,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_dlct: cti@6c2a000 { @@ -3064,6 +3142,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_dlct: cti@6c2b000 { @@ -3076,6 +3155,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti2_dlct: cti@6c2c000 { @@ -3088,6 +3168,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_dlmm: cti@6c09000 { @@ -3100,6 +3181,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_dlmm: cti@6c0a000 { @@ -3112,6 +3194,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_dlcompute: cti@6c3a000 { @@ -3124,6 +3207,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_ddr0: cti@6e02000 { @@ -3136,6 +3220,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_ddr0: cti@6e03000 { @@ -3148,6 +3233,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti2_ddr0: cti@6e04000 { @@ -3160,6 +3246,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti0_ddr1: cti@6e10000 { @@ -3172,6 +3259,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti1_ddr1: cti@6e11000 { @@ -3184,6 +3272,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti2_ddr1: cti@6e12000 { @@ -3196,6 +3285,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_gpu_m3: cti@6962000 { @@ -3234,6 +3324,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_npu_dl0: cti@6c42000 { @@ -3246,6 +3337,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_npu_dl1: cti@6c43000 { @@ -3258,6 +3350,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_npu: cti@6c4b000 { @@ -3270,6 +3363,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_turing:cti@6982000 { @@ -3282,6 +3376,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; cti_turing_q6:cti@698b000 { @@ -3294,6 +3389,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; tpdm_lpass_lpi: tpdm@6b26000 { @@ -3351,6 +3447,7 @@ clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; hwevent { @@ -3359,5 +3456,6 @@ coresight-csr = <&csr>; clocks = <&aopcc QDSS_CLK>; clock-names = "apb_pclk"; + status = "disabled"; }; }; diff --git a/qcom/lito-gdsc.dtsi b/qcom/lito-gdsc.dtsi index fff09af0..e575e0d7 100644 --- a/qcom/lito-gdsc.dtsi +++ b/qcom/lito-gdsc.dtsi @@ -11,6 +11,8 @@ compatible = "qcom,gdsc"; reg = <0x10f004 0x4>; regulator-name = "usb30_prim_gdsc"; + proxy-supply = <&usb30_prim_gdsc>; + qcom,proxy-consumer-enable; status = "disabled"; }; @@ -109,6 +111,8 @@ qcom,no-status-check-on-disable; qcom,clk-dis-wait-val = <8>; qcom,gds-timeout = <500>; + proxy-supply = <&gpu_cx_gdsc>; + qcom,proxy-consumer-enable; status = "disabled"; }; @@ -138,6 +142,8 @@ compatible = "qcom,gdsc"; reg = <0x9981004 0x4>; regulator-name = "npu_core_gdsc"; + proxy-supply = <&npu_core_gdsc>; + qcom,proxy-consumer-enable; status = "disabled"; }; diff --git a/qcom/lito-gpu.dtsi b/qcom/lito-gpu.dtsi index 76c7a7d8..77d0be6a 100644 --- a/qcom/lito-gpu.dtsi +++ b/qcom/lito-gpu.dtsi @@ -3,6 +3,7 @@ compatible = "qcom,pil-tz-generic"; qcom,pas-id = <13>; qcom,firmware-name = "a620_zap"; + qcom,msm-bus,name = "pil-kgsl-hyp"; }; msm_bus: qcom,kgsl-busmon { @@ -16,6 +17,7 @@ governor = "bw_vbif"; qcom,src-dst-ports = <26 512>; operating-points-v2 = <&suspendable_ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-bw_vbif"; }; gpu_opp_table: gpu-opp-table { @@ -138,6 +140,10 @@ vddcx-supply = <&gpu_cx_gdsc>; vdd-supply = <&gpu_gx_gdsc>; + /* Force these to probe first */ + gmu-supply = <&gmu>; + smmu-supply = <&kgsl_smmu>; + nvmem-cells = <&gpu_speed_bin>, <&gpu_gaming_bin>, <&gpu_lm_efuse>; nvmem-cell-names = "speed_bin", "gaming_bin", "isense_slope"; diff --git a/qcom/lito-pinctrl.dtsi b/qcom/lito-pinctrl.dtsi index 8beb70ec..4aee7f24 100644 --- a/qcom/lito-pinctrl.dtsi +++ b/qcom/lito-pinctrl.dtsi @@ -101,12 +101,12 @@ trigout_a: trigout_a { mux { - pins = "gpio63"; + pins = "gpio4"; function = "qdss_cti"; }; config { - pins = "gpio63"; + pins = "gpio4"; drive-strength = <2>; bias-disable; }; @@ -1515,13 +1515,13 @@ qupv3_se6_spi_active: qupv3_se6_spi_active { mux { pins = "gpio59", "gpio60", "gpio61", - "gpio62"; + "gpio62", "gpio63"; function = "qup10"; }; config { pins = "gpio59", "gpio60", "gpio61", - "gpio62"; + "gpio62", "gpio63"; drive-strength = <6>; bias-disable; }; @@ -1530,13 +1530,13 @@ qupv3_se6_spi_sleep: qupv3_se6_spi_sleep { mux { pins = "gpio59", "gpio60", "gpio61", - "gpio62"; + "gpio62", "gpio63"; function = "gpio"; }; config { pins = "gpio59", "gpio60", "gpio61", - "gpio62"; + "gpio62", "gpio63"; drive-strength = <6>; bias-disable; }; @@ -1610,14 +1610,12 @@ qupv3_se9_spi_pins: qupv3_se9_spi_pins { qupv3_se9_spi_active: qupv3_se9_spi_active { mux { - pins = "gpio46", "gpio47", "gpio48", - "gpio63"; + pins = "gpio46", "gpio47", "gpio48"; function = "qup13"; }; config { - pins = "gpio46", "gpio47", "gpio48", - "gpio63"; + pins = "gpio46", "gpio47", "gpio48"; drive-strength = <6>; bias-disable; }; @@ -1625,14 +1623,12 @@ qupv3_se9_spi_sleep: qupv3_se9_spi_sleep { mux { - pins = "gpio46", "gpio47", "gpio48", - "gpio63"; + pins = "gpio46", "gpio47", "gpio48"; function = "gpio"; }; config { - pins = "gpio46", "gpio47", "gpio48", - "gpio63"; + pins = "gpio46", "gpio47", "gpio48"; drive-strength = <6>; bias-disable; }; diff --git a/qcom/lito-qrd.dtsi b/qcom/lito-qrd.dtsi index 1ca66c2a..87734645 100644 --- a/qcom/lito-qrd.dtsi +++ b/qcom/lito-qrd.dtsi @@ -177,7 +177,7 @@ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; - status = "ok"; + status = "disabled"; }; &sdhc_2 { @@ -195,7 +195,7 @@ cd-gpios = <&tlmm 69 GPIO_ACTIVE_HIGH>; - status = "ok"; + status = "disabled"; }; &pm8150a_amoled { diff --git a/qcom/lito-sde-display.dtsi b/qcom/lito-sde-display.dtsi index 3e85d3e8..3ac24e9f 100644 --- a/qcom/lito-sde-display.dtsi +++ b/qcom/lito-sde-display.dtsi @@ -21,6 +21,8 @@ #include "dsi-panel-rm69299-visionox-fhd-plus-video.dtsi" #include "dsi-panel-r66451-dsc-fhd-plus-144hz-cmd.dtsi" #include <dt-bindings/clock/mdss-7nm-pll-clk.h> +#include <dt-bindings/clock/qcom,dispcc-lito.h> +#include <dt-bindings/clock/qcom,gcc-lito.h> &pm8150l_gpios { disp_pins { @@ -134,6 +136,7 @@ qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; + qcom,msm-bus,name = "dsi-display"; clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, <&mdss_dsi0_pll PCLK_MUX_0_CLK>, <&mdss_dsi0_pll BYTECLK_SRC_0_CLK>, @@ -145,13 +148,16 @@ <&mdss_dsi1_pll BYTECLK_SRC_1_CLK>, <&mdss_dsi1_pll PCLK_SRC_1_CLK>, <&mdss_dsi1_pll SHADOW_BYTECLK_SRC_1_CLK>, - <&mdss_dsi1_pll SHADOW_PCLK_SRC_1_CLK>; + <&mdss_dsi1_pll SHADOW_PCLK_SRC_1_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, + <&gcc GCC_DISP_AHB_CLK>; clock-names = "mux_byte_clk0", "mux_pixel_clk0", "src_byte_clk0", "src_pixel_clk0", "shadow_byte_clk0", "shadow_pixel_clk0", "mux_byte_clk1", "mux_pixel_clk1", "src_byte_clk1", "src_pixel_clk1", - "shadow_byte_clk1", "shadow_pixel_clk1"; + "shadow_byte_clk1", "shadow_pixel_clk1", "iface_clk", + "gcc_clk"; pinctrl-names = "panel_active", "panel_suspend"; pinctrl-0 = <&sde_te_active &disp_pins_default>; diff --git a/qcom/lito-sde-pll.dtsi b/qcom/lito-sde-pll.dtsi index 9bbeb998..7bdedf7b 100644 --- a/qcom/lito-sde-pll.dtsi +++ b/qcom/lito-sde-pll.dtsi @@ -16,6 +16,7 @@ memory-region = <&dfps_data_memory>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; + qcom,msm-bus,name = "dsi_pll_7nm_v4_1_0"; }; mdss_dsi1_pll: qcom,mdss_dsi1_pll { @@ -34,6 +35,7 @@ clock-rate = <0>; qcom,dsi-pll-ssc-en; qcom,dsi-pll-ssc-mode = "down-spread"; + qcom,msm-bus,name = "dsi_pll_7nm_v4_1_1"; }; mdss_dp_pll: qcom,mdss_dp_pll@c011000 { compatible = "qcom,mdss_dp_pll_7nm_v2"; @@ -62,6 +64,7 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "pipe_clk"; clock-rate = <0>; + qcom,msm-bus,name = "dp_pll_7nm"; }; }; diff --git a/qcom/lito-sde.dtsi b/qcom/lito-sde.dtsi index a5b8501a..7e761d30 100644 --- a/qcom/lito-sde.dtsi +++ b/qcom/lito-sde.dtsi @@ -329,6 +329,8 @@ <&dispcc DISP_CC_MDSS_RSCC_AHB_CLK>; clock-names = "vsync_clk", "gdsc_clk", "iface_clk"; + qcom,msm-bus,name = "sde-reg-bus"; + /* data and reg bus scale settings */ qcom,sde-data-bus { qcom,msm-bus,name = "disp_rsc_mnoc_llcc"; diff --git a/qcom/lito-v2.dtsi b/qcom/lito-v2.dtsi index b6045c7f..97affc51 100644 --- a/qcom/lito-v2.dtsi +++ b/qcom/lito-v2.dtsi @@ -1,5 +1,4 @@ #include "lito.dtsi" -#include "camera/lito-v2-camera.dtsi" / { model = "Qualcomm Technologies, Inc. Lito v2"; diff --git a/qcom/lito-vidc.dtsi b/qcom/lito-vidc.dtsi index 40007b8f..82027068 100644 --- a/qcom/lito-vidc.dtsi +++ b/qcom/lito-vidc.dtsi @@ -42,6 +42,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>; qcom,mode = "performance"; qcom,bus-range-kbps = <1000 1000>; + qcom,msm-bus,name = "vidc_bus"; }; venus_bus_ddr { @@ -51,6 +52,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; qcom,mode = "venus-ddr"; qcom,bus-range-kbps = <1000 6533000>; + qcom,msm-bus,name = "vidc_bus"; }; arm9_bus_ddr { @@ -60,6 +62,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; qcom,mode = "performance"; qcom,bus-range-kbps = <1000 1000>; + qcom,msm-bus,name = "vidc_bus"; }; /* MMUs */ @@ -156,6 +159,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>; qcom,mode = "performance"; qcom,bus-range-kbps = <1000 1000>; + qcom,msm-bus,name = "vidc_bus"; }; venus_bus_ddr { @@ -165,6 +169,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; qcom,mode = "venus-ddr"; qcom,bus-range-kbps = <1000 6533000>; + qcom,msm-bus,name = "vidc_bus"; }; arm9_bus_ddr { @@ -174,6 +179,7 @@ qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>; qcom,mode = "performance"; qcom,bus-range-kbps = <1000 1000>; + qcom,msm-bus,name = "vidc_bus"; }; /* MMUs */ diff --git a/qcom/lito.dtsi b/qcom/lito.dtsi index 452e6808..24b013a4 100644 --- a/qcom/lito.dtsi +++ b/qcom/lito.dtsi @@ -36,7 +36,7 @@ mboxes = <&qmp_aop 0>; }; - aliases { + aliases: aliases { serial0 = &qupv3_se2_2uart; /*RUMI*/ ufshc1 = &ufshc_mem; /* Embedded UFS slot */ swr0 = &swr0; @@ -304,34 +304,12 @@ }; }; - firmware: firmware { - android { - compatible = "android,firmware"; - vbmeta { - compatible = "android,vbmeta"; - parts = "vbmeta,boot,system,vendor,dtbo"; - }; - - fstab { - compatible = "android,fstab"; - vendor { - compatible = "android,vendor"; - dev = "/dev/block/platform/soc/1d84000.ufshc/by-name/vendor"; - type = "ext4"; - mnt_flags = "ro,barrier=1,discard"; - fsmgr_flags = "wait,slotselect,avb"; - status = "ok"; - }; - }; - }; - }; - psci { compatible = "arm,psci-1.0"; method = "smc"; }; - reserved-memory { + reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; @@ -534,7 +512,7 @@ }; chosen { - bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7 earlycon=msm_geni_serial,0x888000 kpti=off"; + bootargs = "rcupdate.rcu_expedited=1 rcu_nocbs=0-7"; }; soc: soc { }; @@ -1262,7 +1240,7 @@ <DCC_READ 0x92c8064 1 0>; }; - restart@c264000 { + msm_poweroff: restart@c264000 { compatible = "qcom,pshold"; reg = <0xc264000 0x4>, <0x1fd3000 0x4>; @@ -1424,6 +1402,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU0>; + status = "disabled"; }; jtag_mm1: jtagmm@7140000 { @@ -1435,6 +1414,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU1>; + status = "disabled"; }; jtag_mm2: jtagmm@7240000 { @@ -1446,6 +1426,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU2>; + status = "disabled"; }; jtag_mm3: jtagmm@7340000 { @@ -1457,6 +1438,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU3>; + status = "disabled"; }; jtag_mm4: jtagmm@7440000 { @@ -1468,6 +1450,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU4>; + status = "disabled"; }; jtag_mm5: jtagmm@7540000 { @@ -1479,6 +1462,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU5>; + status = "disabled"; }; jtag_mm6: jtagmm@7640000 { @@ -1490,6 +1474,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU6>; + status = "disabled"; }; jtag_mm7: jtagmm@7740000 { @@ -1501,6 +1486,7 @@ clock-names = "core_clk"; qcom,coresight-jtagmm-cpu = <&CPU7>; + status = "disabled"; }; keepalive_opp_table: keepalive-opp-table { @@ -1518,6 +1504,7 @@ qcom,active-only; status = "ok"; operating-points-v2 = <&keepalive_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; bus_proxy_client: qcom,bus_proxy_client { @@ -1529,7 +1516,7 @@ <22 512 0 0>, <23 512 0 0>, <22 512 0 5000000>, <23 512 0 5000000>; qcom,msm-bus,active-only; - status = "ok"; + status = "disabled"; }; qcom,sps { @@ -1607,6 +1594,8 @@ reg-names = "cc_base"; vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_cx_ao-supply = <&VDD_CX_LEVEL_AO>; + gdsc_cx-supply = <&gpu_cx_gdsc>; + clocks = <&rpmhcc RPMH_CXO_CLK>; #clock-cells = <1>; #reset-cells = <1>; }; @@ -1653,6 +1642,7 @@ reg-names = "cc_base"; vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_mx-supply = <&VDD_MX_LEVEL>; + gdsc_cx-supply = <&gpu_cx_gdsc>; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; #clock-cells = <1>; @@ -1666,6 +1656,7 @@ <0x9810000 0x10000>; reg-names = "cc", "qdsp6ss", "qdsp6ss_pll"; vdd_cx-supply = <&VDD_CX_LEVEL>; + npu_core-supply = <&npu_core_gdsc>; nvmem-cells = <&npu_efuse>; nvmem-cell-names = "npu-bin"; #clock-cells = <1>; @@ -1703,8 +1694,6 @@ <0x18327800 0x1000>; reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; - clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; - clock-names = "xo", "alternate"; qcom,no-accumulative-counter; #freq-domain-cells = <2>; }; @@ -2831,6 +2820,8 @@ clock-names = "xo"; qcom,proxy-clock-names = "xo"; + qcom,msm-bus,name = "pil-lpass"; + qcom,pas-id = <1>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <423>; @@ -3192,6 +3183,7 @@ <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>; qcom,active-only; operating-points-v2 = <&llcc_bw_opp_table>; + qcom,msm-bus,name = "devbw-perf"; }; cpu_cpu_llcc_bwmon: qcom,cpu-cpu-llcc-bwmon@90b6400 { @@ -3227,6 +3219,7 @@ <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-perf"; }; cpu_llcc_ddr_bwmon: qcom,cpu-llcc-ddr-bwmon@90cd000 { @@ -3260,6 +3253,7 @@ governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_LLCC>; operating-points-v2 = <&suspendable_llcc_bw_opp_table>; + qcom,msm-bus,name = "devbw-perf"; }; npu_npu_llcc_bwmon: qcom,npu-npu-llcc-bwmon@9960300 { @@ -3287,6 +3281,7 @@ governor = "performance"; qcom,src-dst-ports = <MSM_BUS_SLAVE_LLCC MSM_BUS_SLAVE_EBI_CH0>; operating-points-v2 = <&suspendable_ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-perf"; }; npu_llcc_ddr_bwmon: qcom,npu-llcc-ddr-bwmon@90CE000 { @@ -3305,6 +3300,7 @@ governor = "performance"; qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>; operating-points-v2 = <&suspendable_ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-perf"; }; npudsp_npu_ddr_bwmon: qcom,npudsp-npu-ddr-bwmon@70200 { @@ -3329,29 +3325,32 @@ cpu0_cpu_llcc_lat: qcom,cpu0-cpu-llcc-lat { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>; qcom,active-only; operating-points-v2 = <&llcc_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu0_llcc_ddr_lat: qcom,cpu0-llcc-ddr-lat { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu0_memlat_cpugrp: qcom,cpu0-cpugrp { @@ -3409,38 +3408,42 @@ cpu6_cpu_llcc_lat: qcom,cpu6-cpu-llcc-lat { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_LLCC>; qcom,active-only; operating-points-v2 = <&llcc_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu6_llcc_ddr_lat: qcom,cpu6-llcc-ddr-lat { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu6_cpu_ddr_latfloor: qcom,cpu6-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu7_cpu_ddr_latfloor: qcom,cpu7-cpu-ddr-latfloor { compatible = "qcom,devbw"; - governor = "performance"; + governor = "powersave"; qcom,src-dst-ports = <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0>; qcom,active-only; operating-points-v2 = <&ddr_bw_opp_table>; + qcom,msm-bus,name = "devbw-powersave"; }; cpu4_memlat_cpugrp: qcom,cpu4-cpugrp { @@ -3546,6 +3549,7 @@ qcom,firmware-name = "ipa_fws"; qcom,pil-force-shutdown; memory-region = <&pil_ipa_fw_mem>; + qcom,msm-bus,name = "pil-ipa_fws"; }; ipa_hw: qcom,ipa@1e00000 { @@ -3700,6 +3704,7 @@ qcom,pas-id = <23>; qcom,firmware-name = "npu"; memory-region = <&pil_npu_mem>; + qcom,msm-bus,name = "pil-npu"; /* Outputs to npu */ qcom,smem-states = <&npu_smp2p_out 0>; |