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author | Abhinav Gupta <abgupt@qti.qualcomm.com> | 2022-03-24 15:23:35 +0530 |
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committer | Abhinav Gupta <abgupt@qti.qualcomm.com> | 2022-07-29 15:21:13 +0530 |
commit | de87eaa35b4ac80d618ac50b1fd55dd7e6fffdb0 (patch) | |
tree | 7de3e01b0d8c3ea150134076f101061f367e971a | |
parent | 85e11c6a4c5db5f774c701955c6d2b0f98d078de (diff) | |
download | devicetree-de87eaa35b4ac80d618ac50b1fd55dd7e6fffdb0.tar.gz |
ARM: dts: msm: Add configuration for ice driver in kona.dtsi
Added ufs_ice node configuration for the kona target
Change-Id: I77829e5223b70274f9dbac086b6d5ceaf13259ac
-rw-r--r-- | qcom/kona.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/qcom/kona.dtsi b/qcom/kona.dtsi index 39d805cf..87088d7a 100644 --- a/qcom/kona.dtsi +++ b/qcom/kona.dtsi @@ -3013,6 +3013,29 @@ }; }; + ufs_ice: ufsice@1d90000 { + compatible = "qcom,ice"; + reg = <0x1d90000 0x8000>; + qcom,enable-ice-clk; + clock-names = "ufs_core_clk", "bus_clk", + "iface_clk", "ice_core_clk"; + clocks = <&clock_gcc GCC_UFS_PHY_AXI_CLK>, + <&clock_gcc GCC_UFS_1X_CLKREF_EN>, + <&clock_gcc GCC_UFS_PHY_AHB_CLK>, + <&clock_gcc GCC_UFS_PHY_ICE_CORE_CLK>; + qcom,op-freq-hz = <0>, <0>, <0>, <300000000>; + vdd-hba-supply = <&ufs_phy_gdsc>; + qcom,msm-bus,name = "ufs_ice_noc"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <1 650 0 0>, /* No vote */ + <1 650 1000 0>; /* Max. bandwidth */ + qcom,bus-vector-names = "MIN", + "MAX"; + qcom,instance-type = "ufs"; + }; + ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xe00>, <0x1d90000 0x8000>; /* PHY regs */ reg-names = "phy_mem", "ufs_ice"; |