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authorAnthony Huang <anthony.huang@broadcom.corp-partner.google.com>2020-06-02 20:32:52 +0800
committerAhmed ElArabawy <arabawy@google.com>2020-06-04 09:31:15 -0700
commit9102db1d57a3fc73aacad6203cad3aaa6881b50b (patch)
treecf7e3d1146204fffd48d7c45943d23b0d04d5b09
parent47862f36f0e112059a71554499e82e93ee8952ad (diff)
downloadbcm43752-9102db1d57a3fc73aacad6203cad3aaa6881b50b.tar.gz
wifi: debug: SError happened in dhdpcie_cto_init()
1. Move the dhdpcie_cto_init after the si_attach(). In case the chip may be not ready yet. 2. This issue cannot be reproduced. We need to keep monitoring the SError happened again or not. Bug: 157711644 Test: firmware: fw.bcm43752.18.35.387.23.bin Platform: Hikey960 + BCM43752 PCIe Change-Id: Ie65bb841a056863879b5812bb21c0911c69ad4a5 Signed-off-by: Ahmed ElArabawy <arabawy@google.com>
-rwxr-xr-xdhd_pcie.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/dhd_pcie.c b/dhd_pcie.c
index 8fff5e1..75b6271 100755
--- a/dhd_pcie.c
+++ b/dhd_pcie.c
@@ -1538,26 +1538,6 @@ dhdpcie_dongle_attach(dhd_bus_t *bus)
DHD_TRACE(("%s: ENTER\n", __FUNCTION__));
- /* Configure CTO Prevention functionality */
-#if defined(BCMPCIE_CTO_PREVENTION)
- chipid = dhd_get_chipid(bus);
-
- if (BCM4349_CHIP(chipid) || BCM4350_CHIP(chipid) || BCM4345_CHIP(chipid)) {
- DHD_ERROR(("Disable CTO\n"));
- bus->cto_enable = FALSE;
- } else {
- DHD_ERROR(("Enable CTO\n"));
- bus->cto_enable = TRUE;
- }
-#else
- DHD_ERROR(("Disable CTO\n"));
- bus->cto_enable = FALSE;
-#endif /* BCMPCIE_CTO_PREVENTION */
-
- if (PCIECTO_ENAB(bus)) {
- dhdpcie_cto_init(bus, TRUE);
- }
-
#ifdef CONFIG_ARCH_EXYNOS
link_recovery = bus->dhd;
#endif /* CONFIG_ARCH_EXYNOS */
@@ -1598,6 +1578,26 @@ dhdpcie_dongle_attach(dhd_bus_t *bus)
goto fail;
}
+ /* Configure CTO Prevention functionality */
+#if defined(BCMPCIE_CTO_PREVENTION)
+ chipid = dhd_get_chipid(bus);
+
+ if (BCM4349_CHIP(chipid) || BCM4350_CHIP(chipid) || BCM4345_CHIP(chipid)) {
+ DHD_ERROR(("Disable CTO\n"));
+ bus->cto_enable = FALSE;
+ } else {
+ DHD_ERROR(("Enable CTO\n"));
+ bus->cto_enable = TRUE;
+ }
+#else
+ DHD_ERROR(("Disable CTO\n"));
+ bus->cto_enable = FALSE;
+#endif /* BCMPCIE_CTO_PREVENTION */
+
+ if (PCIECTO_ENAB(bus)) {
+ dhdpcie_cto_init(bus, TRUE);
+ }
+
if (MULTIBP_ENAB(bus->sih) && (bus->sih->buscorerev >= 66)) {
/*
* HW JIRA - CRWLPCIEGEN2-672