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author | Ruofei Ma <ruofeim@google.com> | 2022-12-13 14:34:24 -0800 |
---|---|---|
committer | Ruofei Ma <ruofeim@google.com> | 2022-12-13 23:26:47 +0000 |
commit | 9c71813efd25843fade6af9aac21ac7694eb36ec (patch) | |
tree | 9ad517b21225c156f3b5d94c19b225c4e10e84dc | |
parent | be7c095ef86dd9d083af7b0045765fa8406179f4 (diff) | |
download | gchips-9c71813efd25843fade6af9aac21ac7694eb36ec.tar.gz |
Clear the register for HW to get into LC mode
Clear sw_mode_dec and sw_coding_mode after each frame to for the HW to
complete LCD -> LC transition.
Bug: 259721966
Change-Id: I14cbb16771873a49c654f2754b986dca37dc139b
Signed-off-by: Ruofei Ma <ruofeim@google.com>
-rw-r--r-- | bigo.c | 2 | ||||
-rw-r--r-- | bigo_io.h | 1 |
2 files changed, 3 insertions, 0 deletions
@@ -516,6 +516,8 @@ static irqreturn_t bigo_isr(int irq, void *arg) spin_lock_irqsave(&core->status_lock, flags); core->stat_with_irq = bigo_stat; spin_unlock_irqrestore(&core->status_lock, flags); + bigo_stat &= ~BIGO_STAT_MODE; + bigo_stat &= ~BIGO_STAT_CODING_MODE; bigo_stat &= ~BIGO_STAT_IRQMASK; bigo_core_writel(core, BIGO_REG_STAT, bigo_stat); complete(&core->frame_done); @@ -32,6 +32,7 @@ #define BIGO_STAT_AXI_WR_OVERFLOW BIT(10) #define BIGO_STAT_AXI_RD_PENDING BIT(19) #define BIGO_STAT_AXI_WR_PENDING BIT(20) +#define BIGO_STAT_CODING_MODE GENMASK(22, 21) #define BIG_STAT_AXI_OVERFLOW_ID GENMASK(30, 23) #define BIGO_STAT_IRQMASK GENMASK(6, 2) |