diff options
author | Jonglin Lee <jonglin@google.com> | 2023-07-14 18:08:20 +0000 |
---|---|---|
committer | Jonglin Lee <jonglin@google.com> | 2023-07-14 19:13:25 +0000 |
commit | e0e58f787b2ea8eaab1ad32936ea8c61fc393557 (patch) | |
tree | 45556682565d435d4a9a7aa1da969274351f2ba0 | |
parent | bc42bd7391d817552e084d5a258712230c918d2c (diff) | |
download | gs-e0e58f787b2ea8eaab1ad32936ea8c61fc393557.tar.gz |
Revert "tty: exynos_tty: change to count based loop"
This reverts commit 52ac4f4231c9d4f94bd7a063ba8531b83d378955.
Reason for revert: causing kernel panic regressions
Bug: 290872637
Signed-off-by: Jonglin Lee <jonglin@google.com>
Change-Id: Id4670051dbbae7939a0b77777e8be4def0a861d2
-rw-r--r-- | drivers/tty/serial/exynos_tty.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/drivers/tty/serial/exynos_tty.c b/drivers/tty/serial/exynos_tty.c index c086ad2e5..92cfcba8f 100644 --- a/drivers/tty/serial/exynos_tty.c +++ b/drivers/tty/serial/exynos_tty.c @@ -2462,17 +2462,13 @@ static void exynos_serial_rx_fifo_wait(struct exynos_uart_port *ourport) exynos_clear_bit(port, S3C64XX_UINTM_RXD, S3C64XX_UINTM); ourport->rx_enabled = 1; - wait_time = loops_per_jiffy * HZ; + wait_time = jiffies + HZ; do { port = &ourport->port; fifo_stat = rd_regl(port, S3C2410_UFSTAT); cpu_relax(); } while (exynos_serial_rx_fifocnt(ourport, fifo_stat) && - --wait_time); - if (wait_time == 0) { - dev_warn(port->dev, "Timed out flushing RX FIFO\n"); - uart_sfr_dump(ourport); - } + time_before(jiffies, wait_time)); } if (ourport->rx_enabled) @@ -2487,17 +2483,13 @@ void exynos_serial_fifo_wait(void) unsigned long wait_time; list_for_each_entry(ourport, &drvdata_list, node) { - wait_time = loops_per_jiffy / 4 * HZ; + wait_time = jiffies + HZ / 4; do { port = &ourport->port; fifo_stat = rd_regl(port, S3C2410_UFSTAT); cpu_relax(); } while (exynos_serial_tx_fifocnt(ourport, fifo_stat) && - --wait_time); - if (wait_time == 0) { - dev_warn(port->dev, "Timed out flushing FIFO\n"); - uart_sfr_dump(ourport); - } + time_before(jiffies, wait_time)); } } EXPORT_SYMBOL_GPL(exynos_serial_fifo_wait); |