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| author | Jone Chou <jonechou@google.com> | 2021-07-01 14:37:03 +0800 |
|---|---|---|
| committer | Jone Chou <jonechou@google.com> | 2021-07-02 20:29:26 +0800 |
| commit | 62f56dfee1a8ebe5915143596b69c4f923aaf511 (patch) | |
| tree | 94a393faad42084c63786c8cfde29a2847a3fcdb | |
| parent | 3c3e0f91dcc3bcebd50b5630b54783f7a570474a (diff) | |
| download | reset-62f56dfee1a8ebe5915143596b69c4f923aaf511.tar.gz | |
power: reset: gs201: support PS_HOLD cold reboot
Also persist reboot mode as below
IF in_panic
use warm reboot by swreset
else
store reboot mode to GBMS_TAG_RSBM(bms_storage)
use cold reboot by PS_HOLD
Bug: 191666662
Bug: 191485838
Signed-off-by: Jone Chou <jonechou@google.com>
Change-Id: Icef866be83f1a3adc9adfc28e3410569dc60365d
| -rw-r--r-- | exynos-gs201-reboot.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/exynos-gs201-reboot.c b/exynos-gs201-reboot.c index 8059174..0e46aa9 100644 --- a/exynos-gs201-reboot.c +++ b/exynos-gs201-reboot.c @@ -89,6 +89,7 @@ static void exynos_reboot_mode_set(u32 val) { int ret; phys_addr_t reboot_cmd_addr = pmu_alive_base + reboot_cmd_offset; + u32 reboot_mode; ret = set_priv_reg(reboot_cmd_addr, val); /* TODO: remove following fallback. see b/169128860 */ @@ -97,6 +98,12 @@ static void exynos_reboot_mode_set(u32 val) __func__, &reboot_cmd_addr); regmap_write(pmureg, reboot_cmd_offset, val); } + + reboot_mode = val | BMS_RSBM_VALID; + ret = gbms_storage_write(GBMS_TAG_RSBM, &reboot_mode, sizeof(reboot_mode)); + if (ret < 0) + pr_err("%s(): failed to write gbms storage: %d(%d)\n", __func__, + GBMS_TAG_RSBM, ret); } static void exynos_reboot_parse(const char *cmd) @@ -156,7 +163,13 @@ static int exynos_restart_handler(struct notifier_block *this, unsigned long mod /* Do S/W Reset */ pr_emerg("%s: Exynos SoC reset right now\n", __func__); - set_priv_reg(pmu_alive_base + warm_reboot_offset, warm_reboot_trigger); + if (dbg_snapshot_get_panic_status()) { + set_priv_reg(pmu_alive_base + warm_reboot_offset, warm_reboot_trigger); + } else { + pr_emerg("Set PS_HOLD Low.\n"); + mdelay(2); + rmw_priv_reg(pmu_alive_base + cold_reboot_offset, cold_reboot_trigger, 0); + } while (1) wfi(); |