Merge android13-gs-pixel-5.10-24Q2 into android13-gs-pixel-5.10

SBMerger: 571992243
Change-Id: If44aa83f1fd1e3e3faed16efe2ee089b33142a60
Signed-off-by: SecurityBot <android-nexus-securitybot@system.gserviceaccount.com>

4 files changed, 25 insertions, 14 deletions

diff --git a/mali_kbase/csf/mali_kbase_csf_firmware.c b/mali_kbase/csf/mali_kbase_csf_firmware.c
index d6d2456..407a06e 100644
--- a/mali_kbase/csf/mali_kbase_csf_firmware.c
+++ b/mali_kbase/csf/mali_kbase_csf_firmware.c
@@ -56,10 +56,9 @@
 #include <linux/delay.h>
 #include <linux/version_compat_defs.h>
 
-#define MALI_MAX_DEFAULT_FIRMWARE_NAME_LEN ((size_t)24)
-
-static char default_fw_name[MALI_MAX_DEFAULT_FIRMWARE_NAME_LEN] = "mali_csffw-r47p0.bin";
-module_param_string(fw_name, default_fw_name, sizeof(default_fw_name), 0644);
+static char release_fw_name[] = "mali_csffw-r47p0.bin";
+static char default_fw_name[] = "mali_csffw.bin";
+module_param_string(fw_name, release_fw_name, sizeof(release_fw_name), 0644);
 MODULE_PARM_DESC(fw_name, "firmware image");
 
 /* The waiting time for firmware to boot */
@@ -2407,7 +2406,8 @@ int kbase_csf_firmware_load_init(struct kbase_device *kbdev)
 	u32 entry_end_offset;
 	u32 entry_offset;
 	int ret;
-	const char *fw_name = default_fw_name;
+	const char *fw_name = release_fw_name;
+	const char *fallback_fw_name = default_fw_name;
 
 	lockdep_assert_held(&kbdev->fw_load_lock);
 
@@ -2457,8 +2457,17 @@ int kbase_csf_firmware_load_init(struct kbase_device *kbdev)
 
 #endif /* IS_ENABLED(CONFIG_OF) */
 
+	/* First we will attempt to open the named release version firmware, if
+	 * that fails, we will open the default one.
+	 * See b/297471843 for more information.
+	 */
 	if (request_firmware(&firmware, fw_name, kbdev->dev) != 0) {
-		dev_err(kbdev->dev, "Failed to load firmware image '%s'\n", fw_name);
+		/* No warning here, just a silent fallback */
+		ret = request_firmware(&firmware, fallback_fw_name, kbdev->dev);
+	}
+
+	if (ret) {
+		dev_err(kbdev->dev, "Failed to load firmware image '%s'\n", fallback_fw_name);
 		ret = -ENOENT;
 	} else {
 		/* Try to save a copy and then release the loaded firmware image */
diff --git a/mali_kbase/csf/mali_kbase_csf_reset_gpu.c b/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
index 53f05fb..c722c96 100644
--- a/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
+++ b/mali_kbase/csf/mali_kbase_csf_reset_gpu.c
@@ -238,8 +238,6 @@ static void kbase_csf_reset_end_hw_access(struct kbase_device *kbdev, int err_du
 
 void kbase_csf_debug_dump_registers(struct kbase_device *kbdev)
 {
-#define DOORBELL_CFG_BASE 0x20000
-#define MCUC_DB_VALUE_0 0x80
 	struct kbase_csf_global_iface *global_iface = &kbdev->csf.global_iface;
 
 	kbase_io_history_dump(kbdev);
@@ -269,12 +267,11 @@ void kbase_csf_debug_dump_registers(struct kbase_device *kbdev)
 			kbase_reg_read32(kbdev, GPU_CONTROL_ENUM(TILER_CONFIG)));
 	}
 
-	dev_err(kbdev->dev, "  MCU DB0: %x", kbase_reg_read32(kbdev, DOORBELL_CFG_BASE + MCUC_DB_VALUE_0));
-	dev_err(kbdev->dev, "  MCU GLB_REQ %x GLB_ACK %x",
-			kbase_csf_firmware_global_input_read(global_iface, GLB_REQ),
-			kbase_csf_firmware_global_output(global_iface, GLB_ACK));
-#undef MCUC_DB_VALUE_0
-#undef DOORBELL_CFG_BASE
+	dev_err(kbdev->dev, "  MCU DB0: %x", kbase_reg_read32(kbdev, DEBUG_MCUC_DB_VALUE_0));
+	if (global_iface && global_iface->kbdev && global_iface->input && global_iface->output)
+		dev_err(kbdev->dev, "  MCU GLB_REQ %x GLB_ACK %x",
+				kbase_csf_firmware_global_input_read(global_iface, GLB_REQ),
+				kbase_csf_firmware_global_output(global_iface, GLB_ACK));
 
 }
 
diff --git a/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf.c b/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf.c
index 89997e9..7e1b4a1 100644
--- a/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf.c
+++ b/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf.c
@@ -683,6 +683,8 @@ static void kbase_regmap_v10_8_init(struct kbase_device *kbdev)
 							   KBASE_REGMAP_PERM_WRITE;
 	kbdev->regmap.flags[DOORBELL_BLOCK_63__DOORBELL] = KBASE_REGMAP_WIDTH_32_BIT |
 							   KBASE_REGMAP_PERM_WRITE;
+	kbdev->regmap.flags[DEBUG_MCUC_DB_VALUE_0] =
+		KBASE_REGMAP_WIDTH_32_BIT | KBASE_REGMAP_PERM_READ | KBASE_REGMAP_PERM_WRITE;
 
 	kbdev->regmap.regs[GPU_CONTROL__GPU_ID] = kbdev->reg + 0x0;
 	kbdev->regmap.regs[GPU_CONTROL__L2_FEATURES] = kbdev->reg + 0x4;
@@ -1003,6 +1005,7 @@ static void kbase_regmap_v10_8_init(struct kbase_device *kbdev)
 	kbdev->regmap.regs[DOORBELL_BLOCK_61__DOORBELL] = kbdev->reg + 0x450000;
 	kbdev->regmap.regs[DOORBELL_BLOCK_62__DOORBELL] = kbdev->reg + 0x460000;
 	kbdev->regmap.regs[DOORBELL_BLOCK_63__DOORBELL] = kbdev->reg + 0x470000;
+	kbdev->regmap.regs[DEBUG_MCUC_DB_VALUE_0] = kbdev->reg + 0x20080;
 }
 
 static void kbase_regmap_v10_10_init(struct kbase_device *kbdev)
@@ -1514,6 +1517,7 @@ static char *enum_strings[] = {
 	[GPU_CONTROL__GPU_COMMAND_ARG1] = "GPU_CONTROL__GPU_COMMAND_ARG1",
 	[GPU_CONTROL__MCU_FEATURES] = "GPU_CONTROL__MCU_FEATURES",
 	[GPU_CONTROL__SHADER_PWRFEATURES] = "GPU_CONTROL__SHADER_PWRFEATURES",
+	[DEBUG_MCUC_DB_VALUE_0] = "DEBUG_MCUC_DB_VALUE_0",
 };
 
 const char *kbase_reg_get_enum_string(u32 reg_enum)
diff --git a/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf_enums.h b/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf_enums.h
index e05af18..b030ffe 100644
--- a/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf_enums.h
+++ b/mali_kbase/hw_access/regmap/mali_kbase_regmap_csf_enums.h
@@ -351,6 +351,7 @@ enum kbase_regmap_enum_v10_8 {
 	DOORBELL_BLOCK_61__DOORBELL, /* (WO) 32-bit 0x450000 */
 	DOORBELL_BLOCK_62__DOORBELL, /* (WO) 32-bit 0x460000 */
 	DOORBELL_BLOCK_63__DOORBELL, /* (WO) 32-bit 0x470000 */
+	DEBUG_MCUC_DB_VALUE_0, /* (RO) 32-bit 0x20080 */
 	NR_V10_8_REGS,
 };