Merge android13-gs-pixel-5.10-24Q1 into android13-gs-pixel-5.10

SBMerger: 571992243
Change-Id: I25ad2b6e1db4db2b6d99780c2038ddb53ccdab06
Signed-off-by: SecurityBot <android-nexus-securitybot@system.gserviceaccount.com>

6 files changed, 8 insertions, 9 deletions

diff --git a/mali_kbase/backend/gpu/mali_kbase_pm_adaptive.c b/mali_kbase/backend/gpu/mali_kbase_pm_adaptive.c
index df7bde2..62fb67e 100644
--- a/mali_kbase/backend/gpu/mali_kbase_pm_adaptive.c
+++ b/mali_kbase/backend/gpu/mali_kbase_pm_adaptive.c
@@ -33,8 +33,8 @@
 #include <mali_kbase_config_defaults.h>
 #include <mali_kbase_pm.h>
 
-/**
- * The number of times the adaptive power off hysteresis timer can fire without
+
+/* The number of times the adaptive power off hysteresis timer can fire without
  * an intervening GPU active period before power off hysteresis is set to 0.
  */
 #ifndef DEFAULT_PM_ADAPTIVE_HYSTERESIS
diff --git a/mali_kbase/csf/mali_kbase_csf.c b/mali_kbase/csf/mali_kbase_csf.c
index c64cc3e..91d5c43 100644
--- a/mali_kbase/csf/mali_kbase_csf.c
+++ b/mali_kbase/csf/mali_kbase_csf.c
@@ -2446,7 +2446,7 @@ static void report_queue_fatal_error(struct kbase_queue *const queue, u32 cs_fat
 }
 
 /**
- * fatal_event_worker - Handle the CS_FATAL/CS_FAULT error for the GPU queue
+ * cs_error_worker - Handle the CS_FATAL/CS_FAULT error for the GPU queue
  *
  * @data: Pointer to a work_struct embedded in GPU command queue.
  *
diff --git a/mali_kbase/csf/mali_kbase_csf_kcpu.c b/mali_kbase/csf/mali_kbase_csf_kcpu.c
index 049b8eb..52bd307 100644
--- a/mali_kbase/csf/mali_kbase_csf_kcpu.c
+++ b/mali_kbase/csf/mali_kbase_csf_kcpu.c
@@ -2833,8 +2833,6 @@ int kbase_csf_kcpu_queue_new(struct kbase_context *kctx,
 		goto out;
 	}
 
-	bitmap_set(kctx->csf.kcpu_queues.in_use, idx, 1);
-	kctx->csf.kcpu_queues.array[idx] = queue;
 	mutex_init(&queue->lock);
 	queue->kctx = kctx;
 	queue->start_offset = 0;
@@ -2894,6 +2892,8 @@ int kbase_csf_kcpu_queue_new(struct kbase_context *kctx,
 	atomic_set(&queue->fence_signal_pending_cnt, 0);
 	kbase_timer_setup(&queue->fence_signal_timeout, fence_signal_timeout_cb);
 #endif
+	bitmap_set(kctx->csf.kcpu_queues.in_use, idx, 1);
+	kctx->csf.kcpu_queues.array[idx] = queue;
 out:
 	mutex_unlock(&kctx->csf.kcpu_queues.lock);
 
diff --git a/mali_kbase/csf/mali_kbase_csf_sync_debugfs.c b/mali_kbase/csf/mali_kbase_csf_sync_debugfs.c
index 72c0b6f..0615d5f 100644
--- a/mali_kbase/csf/mali_kbase_csf_sync_debugfs.c
+++ b/mali_kbase/csf/mali_kbase_csf_sync_debugfs.c
@@ -366,7 +366,7 @@ static void kbasep_csf_sync_print_kcpu_cqs_set_op(struct kbase_context *kctx, ch
 }
 
 /**
- * kbasep_csf_kcpu_debugfs_print_queue() - Print debug data for a KCPU queue
+ * kbasep_csf_sync_kcpu_debugfs_print_queue() - Print debug data for a KCPU queue
  *
  * @kctx:  The kbase context.
  * @file:  The seq_file to print to.
diff --git a/mali_pixel/memory_group_manager.c b/mali_pixel/memory_group_manager.c
index 620302a..0cde4e0 100644
--- a/mali_pixel/memory_group_manager.c
+++ b/mali_pixel/memory_group_manager.c
@@ -31,8 +31,7 @@
 #define ORDER_SMALL_PAGE 0
 #define ORDER_LARGE_PAGE 9
 
-/**
- * Borr does not have "real" PBHA support. However, since we only use a 36-bit PA on the bus,
+/* Borr does not have "real" PBHA support. However, since we only use a 36-bit PA on the bus,
  * AxADDR[39:36] is wired up to the GPU AxUSER[PBHA] field seen by the rest of the system.
  * Those AxADDR bits come from [39:36] in the page descriptor.
  *
diff --git a/mali_pixel/protected_memory_allocator.c b/mali_pixel/protected_memory_allocator.c
index 6d1e555..25b5bde 100644
--- a/mali_pixel/protected_memory_allocator.c
+++ b/mali_pixel/protected_memory_allocator.c
@@ -194,7 +194,7 @@ static phys_addr_t mali_pma_get_phys_addr(
 }
 
 /**
- * pma_free_page - Free a page of memory
+ * mali_pma_free_page - Free a page of memory
  *
  * @pma_dev: The protected memory allocator the request is being made
  *           through.