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-rw-r--r--BUILD.bazel3
-rwxr-xr-xbuild_shusky.sh40
-rw-r--r--display/panel-google-bigsurf.c5
-rw-r--r--display/panel-google-hk3.c78
-rw-r--r--display/panel-google-shoreline.c3
-rw-r--r--dts/google/zuma-ripcurrent-bcl.dtsi6
-rw-r--r--dts/google/zuma-ripcurrent-usb.dtsi13
-rw-r--r--dts/google/zuma-shiba-battery.dtsi5
-rw-r--r--dts/google/zuma-shusky-battery.dtsi4
-rw-r--r--dts/google/zuma-shusky-bcl.dtsi6
-rw-r--r--dts/google/zuma-shusky-pcie.dtsi17
-rw-r--r--dts/google/zuma-shusky-usb.dtsi26
-rw-r--r--dts/google/zuma-shusky-wcharger.dtsi2
-rw-r--r--shusky_gki.fragment7
14 files changed, 138 insertions, 77 deletions
diff --git a/BUILD.bazel b/BUILD.bazel
index 56b0a81..6672f0c 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -242,6 +242,7 @@ kernel_build(
"//private/google-modules/soc/gs:gki_aosp": "//aosp:android/abi_gki_aarch64_pixel",
"//private/google-modules/soc/gs:gki_aosp_staging": "//aosp-staging:android/abi_gki_aarch64_pixel",
}),
+ make_goals = _PIXEL_MAKE_GOALS,
module_outs = [
# keep sorted
"drivers/i2c/i2c-dev.ko",
@@ -256,7 +257,6 @@ kernel_build(
"net/wireless/cfg80211.ko",
],
strip_modules = True,
- make_goals = _PIXEL_MAKE_GOALS,
)
kernel_abi(
@@ -343,6 +343,7 @@ lto_dependant_kernel_module(
"drivers/soc/google/debug/debug-snapshot-debug-kinfo.ko",
"drivers/soc/google/debug/dss.ko",
"drivers/soc/google/debug/ehld.ko",
+ "drivers/soc/google/debug/etm2dram.ko",
"drivers/soc/google/debug/exynos-adv-tracer.ko",
"drivers/soc/google/debug/exynos-adv-tracer-s2d.ko",
"drivers/soc/google/debug/exynos-coresight.ko",
diff --git a/build_shusky.sh b/build_shusky.sh
index db7f115..6f7b2b3 100755
--- a/build_shusky.sh
+++ b/build_shusky.sh
@@ -13,24 +13,28 @@ if [ "${BUILD_AOSP_KERNEL}" = "1" -a "${BUILD_STAGING_KERNEL}" = "1" ]; then
exit_if_error 1 "Flags incompatible with BUILD_AOSP_KERNEL detected"
fi
-parameters=
-GKI_BUILD_ID=`sed -n 's/.*gki_prebuilts=\([0-9]\+\).*/\1/p' private/google-modules/soc/gs/device.bazelrc`
-USE_GKI=`grep "build --config=download_gki" private/google-modules/soc/gs/device.bazelrc`
-NO_USE_GKI=`grep "build --config=no_download_gki" private/google-modules/soc/gs/device.bazelrc`
-USE_AOSP_OR_AOSP_STAGING=`grep "build --config=use_source_tree_aosp" private/google-modules/soc/gs/device.bazelrc`
-if [ "${BUILD_AOSP_KERNEL}" = "1" ]; then
- echo -e "\nBuilding with core-kernel generated from source tree aosp/\n"
- parameters="--config=use_source_tree_aosp --config=no_download_gki"
-elif [ "${BUILD_STAGING_KERNEL}" = "1" ]; then
- echo -e "\nBuilding with core-kernel generated from source tree aosp-staging/\n"
- parameters="--config=use_source_tree_aosp_staging --config=no_download_gki"
-elif [ -n "${GKI_BUILD_ID}" ] && [ -n "${USE_GKI}" ] && [ -z "${NO_USE_GKI}" ] && [ -z "${USE_AOSP_OR_AOSP_STAGING}" ]; then
- echo -e "\nBuilding with GKI prebuilts from ab/$GKI_BUILD_ID - kernel_aarch64\n"
-else
- echo -e "\nPlease check private/google-modules/soc/gs/device.bazelrc"
- echo -e " 1) IF \"build --config=use_source_tree_aosp\" ----> core-kernel generated from source tree aosp/"
- echo -e " 2) IF \"build --config=use_source_tree_aosp_staging\" ----> core-kernel generated from source tree aosp-staging/"
- echo -e " 3) IF \"build --config=download_gki\" ----> core-kernel based on GKI prebuilts\n"
+if [ "${#}" = "0" ]; then
+ parameters=
+ bazelrc_file="private/google-modules/soc/gs/device.bazelrc"
+ GKI_BUILD_ID=`sed -n 's/.*gki_prebuilts=\([0-9]\+\).*/\1/p' $bazelrc_file`
+ USE_GKI=`grep "^build --config=download_gki" $bazelrc_file`
+ NO_USE_GKI=`grep "^build --config=no_download_gki" $bazelrc_file`
+ USE_AOSP=`grep "^build --config=use_source_tree_aosp$" $bazelrc_file`
+ USE_AOSP_STAGING=`grep "^build --config=use_source_tree_aosp_staging$" $bazelrc_file`
+ if [ "${BUILD_AOSP_KERNEL}" = "1" ] || [ -n "${USE_AOSP}" ]; then
+ echo -e "\nBuilding with core-kernel generated from source tree aosp/\n"
+ parameters="--config=use_source_tree_aosp --config=no_download_gki"
+ elif [ "${BUILD_STAGING_KERNEL}" = "1" ] || [ -n "${USE_AOSP_STAGING}" ]; then
+ echo -e "\nBuilding with core-kernel generated from source tree aosp-staging/\n"
+ parameters="--config=use_source_tree_aosp_staging --config=no_download_gki"
+ elif [ -n "${GKI_BUILD_ID}" ] && [ -n "${USE_GKI}" ] && [ -z "${NO_USE_GKI}" ] && [ -z "${USE_AOSP}" ] && [ -z "${USE_AOSP_STAGING}" ]; then
+ echo -e "\nBuilding with GKI prebuilts from ab/$GKI_BUILD_ID - kernel_aarch64\n"
+ else
+ echo -e "\nPlease check private/google-modules/soc/gs/device.bazelrc"
+ echo -e " 1) IF \"build --config=use_source_tree_aosp\" ----> core-kernel generated from source tree aosp/"
+ echo -e " 2) IF \"build --config=use_source_tree_aosp_staging\" ----> core-kernel generated from source tree aosp-staging/"
+ echo -e " 3) IF \"build --config=download_gki\" ----> core-kernel based on GKI prebuilts\n"
+ fi
fi
exec tools/bazel run ${parameters} --config=stamp --config=shusky --config=fast //private/devices/google/shusky:zuma_shusky_dist "$@"
diff --git a/display/panel-google-bigsurf.c b/display/panel-google-bigsurf.c
index 1aa3808..0ded27d 100644
--- a/display/panel-google-bigsurf.c
+++ b/display/panel-google-bigsurf.c
@@ -69,8 +69,11 @@ static const u8 bigsurf_lhbm_brightness_reg = 0xD0;
struct bigsurf_panel {
/** @base: base panel struct */
struct exynos_panel base;
+ /** @lhbm_ctl: LHBM control parameters */
struct bigsurf_lhbm_ctl lhbm_ctl;
+ /** @idle_exit_dimming_delay_ts: the delay time to exit dimming */
ktime_t idle_exit_dimming_delay_ts;
+ /** @panel_brightness: the brightness of the panel */
u16 panel_brightness;
};
@@ -85,7 +88,7 @@ static const struct exynos_dsi_cmd bigsurf_lp_cmds[] = {
EXYNOS_DSI_CMD_SEQ(0x53, 0x20),
/* enter AOD */
EXYNOS_DSI_CMD_SEQ(MIPI_DCS_ENTER_IDLE_MODE),
- EXYNOS_DSI_CMD_SEQ(0x5A, 0x00),
+ EXYNOS_DSI_CMD_SEQ(0x5A, 0x04),
};
static DEFINE_EXYNOS_CMD_SET(bigsurf_lp);
diff --git a/display/panel-google-hk3.c b/display/panel-google-hk3.c
index a6d53a6..5731c4e 100644
--- a/display/panel-google-hk3.c
+++ b/display/panel-google-hk3.c
@@ -103,6 +103,19 @@ struct hk3_lhbm_ctl {
bool hist_roi_configured;
};
+#define HK3_VREG_STR_SIZE 11
+#define HK3_VREG_PARAM_NUM 5
+
+/**
+ * HK3_VREG_STR
+ * @ctx: exynos_panel struct
+ *
+ * Expect to have five values for the Vreg parameters:
+ * EVT1.1 and earlier: 0x1B
+ * DVT1 and later: 0x1A
+ */
+#define HK3_VREG_STR(ctx) (((ctx)->panel_rev >= PANEL_REV_DVT1) ? "1a1a1a1a1a" : "1b1b1b1b1b")
+
/**
* struct hk3_panel - panel specific info
*
@@ -146,8 +159,9 @@ struct hk3_panel {
struct thermal_zone_device *tz;
/** @hw_temp: the temperature applied into panel */
u32 hw_temp;
- /** @pending_temp_update: whether there is pending temperature update. It will be
- * handled in the commit_done function.
+ /**
+ * @pending_temp_update: whether there is pending temperature update. It will be
+ * handled in the commit_done function.
*/
bool pending_temp_update;
/**
@@ -155,6 +169,14 @@ struct hk3_panel {
* panel can recover to normal mode after entering pixel-off state.
*/
bool is_pixel_off;
+ /** @hw_vreg: the Vreg setting after calling hk3_read_back_vreg() */
+ char hw_vreg[HK3_VREG_STR_SIZE];
+ /**
+ * @read_vreg: whether need to read back Vreg setting after self_refresh. The Vreg cannot
+ * be read right after it's set, so we have to wait for taking effect, but
+ * cannot block the main thread.
+ */
+ bool read_vreg;
};
#define to_spanel(ctx) container_of(ctx, struct hk3_panel, base)
@@ -897,12 +919,7 @@ static void hk3_update_refresh_mode(struct exynos_panel *ctx,
ctx->panel_idle_vrefresh = idle_vrefresh;
hk3_update_panel_feat(ctx, vrefresh, false);
- /* TODO: (b/303738012) perform notifications asyncly for P24*/
- /* Prevent sysfs_notify from resolution switch */
- if (ctx->mode_in_progress == MODE_RES_AND_RR_IN_PROGRESS)
- schedule_work(&ctx->state_notify);
- else
- backlight_state_changed(ctx->bl);
+ schedule_work(&ctx->state_notify);
dev_dbg(ctx->dev, "%s: display state is notified\n", __func__);
}
@@ -967,6 +984,32 @@ static void hk3_wait_one_vblank(struct exynos_panel *ctx)
DPU_ATRACE_END(__func__);
}
+static void hk3_read_back_vreg(struct exynos_panel *ctx)
+{
+ struct hk3_panel *spanel = to_spanel(ctx);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ char buf[HK3_VREG_PARAM_NUM] = {0};
+ int ret;
+
+ EXYNOS_DCS_BUF_ADD_SET(ctx, unlock_cmd_f0);
+ EXYNOS_DCS_BUF_ADD_AND_FLUSH(ctx, 0xB0, 0x00, 0x31, 0xF4);
+ ret = mipi_dsi_dcs_read(dsi, 0xF4, buf, HK3_VREG_PARAM_NUM);
+ EXYNOS_DCS_BUF_ADD_SET_AND_FLUSH(ctx, lock_cmd_f0);
+ if (ret != HK3_VREG_PARAM_NUM) {
+ dev_warn(ctx->dev, "unable to read vreg setting (%d)\n", ret);
+ } else {
+ exynos_bin2hex(buf, HK3_VREG_PARAM_NUM,
+ spanel->hw_vreg, sizeof(spanel->hw_vreg));
+ if (!strcmp(spanel->hw_vreg, HK3_VREG_STR(ctx)))
+ dev_dbg(ctx->dev, "normal vreg: %s\n", spanel->hw_vreg);
+ else
+ dev_warn(ctx->dev, "abnormal vreg: %s (expect %s)\n",
+ spanel->hw_vreg, HK3_VREG_STR(ctx));
+ }
+
+ spanel->read_vreg = false;
+}
+
static bool hk3_set_self_refresh(struct exynos_panel *ctx, bool enable)
{
const struct exynos_panel_mode *pmode = ctx->current_mode;
@@ -978,11 +1021,14 @@ static bool hk3_set_self_refresh(struct exynos_panel *ctx, bool enable)
if (unlikely(!pmode))
return false;
+ if (enable && spanel->read_vreg)
+ hk3_read_back_vreg(ctx);
+
/* self refresh is not supported in lp mode since that always makes use of early exit */
if (pmode->exynos_mode.is_lp_mode) {
/* set 1Hz while self refresh is active, otherwise clear it */
ctx->panel_idle_vrefresh = enable ? 1 : 0;
- backlight_state_changed(ctx->bl);
+ schedule_work(&ctx->state_notify);
return false;
}
@@ -1373,6 +1419,7 @@ static void hk3_wait_for_vsync_done(struct exynos_panel *ctx, u32 vrefresh, bool
* fake TE at transition from fixed TE to changeable TE.
* @ctx: panel struct
* @vrefresh: current refresh rate
+ * @is_ns: whether it is normal speed or not
*/
static void hk3_wait_for_vsync_done_changeable(struct exynos_panel *ctx, u32 vrefresh, bool is_ns)
{
@@ -1459,6 +1506,7 @@ static void hk3_set_lp_mode(struct exynos_panel *ctx, const struct exynos_panel_
exynos_panel_send_cmd_set(ctx, &hk3_display_on_cmd_set);
spanel->hw_vrefresh = 30;
+ spanel->read_vreg = true;
DPU_ATRACE_END(__func__);
@@ -1509,6 +1557,7 @@ static void hk3_set_nolp_mode(struct exynos_panel *ctx,
hk3_write_display_mode(ctx, &pmode->mode);
hk3_change_frequency(ctx, pmode);
exynos_panel_send_cmd_set(ctx, &hk3_display_on_cmd_set);
+ spanel->read_vreg = true;
DPU_ATRACE_END(__func__);
@@ -1704,6 +1753,7 @@ static int hk3_enable(struct drm_panel *panel)
if (needs_reset || (ctx->panel_state == PANEL_STATE_BLANK)) {
hk3_wait_for_vsync_done(ctx, needs_reset ? 60 : vrefresh, is_ns);
exynos_panel_send_cmd_set(ctx, &hk3_display_on_cmd_set);
+ spanel->read_vreg = true;
}
}
@@ -2122,6 +2172,13 @@ static void hk3_update_ffc(struct exynos_panel *ctx, unsigned int hs_clk)
DPU_ATRACE_END(__func__);
}
+static void hk3_get_pwr_vreg(struct exynos_panel *ctx, char *buf, size_t len)
+{
+ struct hk3_panel *spanel = to_spanel(ctx);
+
+ strlcpy(buf, spanel->hw_vreg, len);
+}
+
static const struct exynos_display_underrun_param underrun_param = {
.te_idle_us = 350,
.te_var = 1,
@@ -2599,6 +2656,7 @@ static int hk3_panel_probe(struct mipi_dsi_device *dsi)
spanel->hw_temp = 25;
spanel->pending_temp_update = false;
spanel->is_pixel_off = false;
+ spanel->read_vreg = false;
return exynos_panel_common_init(dsi, &spanel->base);
}
@@ -2645,6 +2703,7 @@ static const struct exynos_panel_funcs hk3_exynos_funcs = {
.run_normal_mode_work = hk3_normal_mode_work,
.pre_update_ffc = hk3_pre_update_ffc,
.update_ffc = hk3_update_ffc,
+ .get_pwr_vreg = hk3_get_pwr_vreg,
};
const struct brightness_capability hk3_brightness_capability = {
@@ -2699,7 +2758,6 @@ const struct exynos_panel_desc google_hk3 = {
.num_binned_lp = ARRAY_SIZE(hk3_binned_lp),
.is_panel_idle_supported = true,
.no_lhbm_rr_constraints = true,
- .use_async_notify = true,
.panel_func = &hk3_drm_funcs,
.exynos_panel_func = &hk3_exynos_funcs,
.lhbm_effective_delay_frames = 1,
diff --git a/display/panel-google-shoreline.c b/display/panel-google-shoreline.c
index cc1dcee..9b1fb9a 100644
--- a/display/panel-google-shoreline.c
+++ b/display/panel-google-shoreline.c
@@ -399,6 +399,9 @@ static void shoreline_update_te(struct exynos_panel *ctx, const unsigned int vre
}
/**
+ * shoreline_update_te2 - update the TE2 for shoreline panels
+ * @ctx: panel struct
+ *
* Current definition of the B9h command parameter:
*
* TE2 rising at 120Hz:
diff --git a/dts/google/zuma-ripcurrent-bcl.dtsi b/dts/google/zuma-ripcurrent-bcl.dtsi
index a110b53..d689a6f 100644
--- a/dts/google/zuma-ripcurrent-bcl.dtsi
+++ b/dts/google/zuma-ripcurrent-bcl.dtsi
@@ -91,9 +91,9 @@
};
freq_qos {
batoilo {
- cpucl0 = <1704000>;
- cpucl1 = <1945000>;
- cpucl2 = <2294000>;
+ cpucl0 = <955000>;
+ cpucl1 = <1221000>;
+ cpucl2 = <1557000>;
gpu = <723000>;
tpu = <845000>;
};
diff --git a/dts/google/zuma-ripcurrent-usb.dtsi b/dts/google/zuma-ripcurrent-usb.dtsi
index 9c88cca..efb24fc 100644
--- a/dts/google/zuma-ripcurrent-usb.dtsi
+++ b/dts/google/zuma-ripcurrent-usb.dtsi
@@ -13,6 +13,16 @@
extcon = <&max77759tcpc>;
};
+&pinctrl_12 {
+ eusb_init_state: eusb_init_state {
+ samsung,pins = "gpp21-3";
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
+ samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
+ };
+};
+
&eusb_repeater_tune {
status = "okay";
repeater_tune_cnt = <5>;
@@ -53,6 +63,9 @@
compatible = "samsung,eusb-repeater";
reg = <0x3E>;
status = "okay";
+ pinctrl-names = "init_state";
+ pinctrl-0 = <&eusb_init_state>;
repeater_tune_param = <&eusb_repeater_tune>;
+ vdd33-supply = <&m_ldo19_reg>;
};
};
diff --git a/dts/google/zuma-shiba-battery.dtsi b/dts/google/zuma-shiba-battery.dtsi
index 83f361c..c0b8419 100644
--- a/dts/google/zuma-shiba-battery.dtsi
+++ b/dts/google/zuma-shiba-battery.dtsi
@@ -21,6 +21,11 @@
google,aacr-ref-cycles = <200 300 400 500 600 700 800>;
google,aacr-ref-fade10 = < 15 24 32 40 49 58 66>;
};
+ google,batt-id-2-cos {
+ google,batt-id = <2>;
+ google,aacr-ref-cycles = <100 200 300 400 500 600 700 800>;
+ google,aacr-ref-fade10 = < 6 19 29 39 47 54 62 69>;
+ };
};
&max77759_fg {
diff --git a/dts/google/zuma-shusky-battery.dtsi b/dts/google/zuma-shusky-battery.dtsi
index 118b035..a10cfc4 100644
--- a/dts/google/zuma-shusky-battery.dtsi
+++ b/dts/google/zuma-shusky-battery.dtsi
@@ -68,9 +68,9 @@
google_bms {
nvmem = <&pack_bee>;
- nvmem-names = "7-00500";
+ nvmem-names = "9-00500";
/* pack eeprom is available only with P20+ batteries */
- google,bee-name = "7-00500";
+ google,bee-name = "9-00500";
};
};
diff --git a/dts/google/zuma-shusky-bcl.dtsi b/dts/google/zuma-shusky-bcl.dtsi
index fbe093c..f22d393 100644
--- a/dts/google/zuma-shusky-bcl.dtsi
+++ b/dts/google/zuma-shusky-bcl.dtsi
@@ -92,9 +92,9 @@
};
freq_qos {
batoilo {
- cpucl0 = <1704000>;
- cpucl1 = <1945000>;
- cpucl2 = <2294000>;
+ cpucl0 = <955000>;
+ cpucl1 = <1221000>;
+ cpucl2 = <1557000>;
gpu = <723000>;
tpu = <845000>;
};
diff --git a/dts/google/zuma-shusky-pcie.dtsi b/dts/google/zuma-shusky-pcie.dtsi
index 9521135..38baec2 100644
--- a/dts/google/zuma-shusky-pcie.dtsi
+++ b/dts/google/zuma-shusky-pcie.dtsi
@@ -12,22 +12,5 @@
&pcie_1 {
support-msi64-addressing = "true";
- use-cache-coherency = "true";
- dma-coherent;
- use-sysmmu = "true";
};
-&sysmmu_hsi2 {
- use-map-once = "false";
- status = "okay";
- num_pmmu = <1>;
- pmmu0,default_stream = <STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE)>;
- pmmu0,stream_property =
- <1 STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE) DIR_RW STR_ID(0x00) STR_MASK(0x7B)>,
- <2 STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE) DIR_RW STR_ID(0x09) STR_MASK(0x7B)>,
- <3 STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE) DIR_RW STR_ID(0x01) STR_MASK(0x7B)>,
- <4 STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE) DIR_RW STR_ID(0x02) STR_MASK(0x03)>,
- <5 STR_CFG(STR_SPTLB(0x00, 0x00), S2_EN, BL1, PREF_PRED, STLB_NONE, PTLB_NONE) DIR_RW STR_ID(0x03) STR_MASK(0x03)>;
-};
-
-
diff --git a/dts/google/zuma-shusky-usb.dtsi b/dts/google/zuma-shusky-usb.dtsi
index 583943e..d5263ca 100644
--- a/dts/google/zuma-shusky-usb.dtsi
+++ b/dts/google/zuma-shusky-usb.dtsi
@@ -19,17 +19,12 @@
};
&pinctrl_12 {
- eusb_power_off: eusb_power_off {
+ eusb_init_state: eusb_init_state {
samsung,pins = "gpp21-3";
- samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
- samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
- samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_DOWN>;
- };
-
- eusb_power_on: eusb_power_on {
- samsung,pins = "gpp21-3";
- samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
- samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
+ samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
+ samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
+ samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
};
};
@@ -45,7 +40,7 @@
repeater_tune2 {
tune_name = "u_tx_adjust_port1";
- tune_value = <0x70 0x76 0x0 0xff>;
+ tune_value = <0x70 0x3c 0x0 0xff>;
};
repeater_tune3 {
@@ -60,7 +55,7 @@
repeater_tune5 {
tune_name = "u_disconnect_squelch_port1";
- tune_value = <0x73 0x04 0x0 0xff>;
+ tune_value = <0x73 0x83 0x0 0xff>;
};
repeater_tune6 {
@@ -87,10 +82,9 @@
compatible = "samsung,eusb-repeater";
reg = <0x3E>;
status = "okay";
- pinctrl-names = "power_off", "power_on";
- pinctrl-0 = <&eusb_power_off>;
- pinctrl-1 = <&eusb_power_on>;
- eusb,gpio_eusb_resetb = <&gpp21 3 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "init_state";
+ pinctrl-0 = <&eusb_init_state>;
repeater_tune_param = <&eusb_repeater_tune>;
+ vdd33-supply = <&m_ldo19_reg>;
};
};
diff --git a/dts/google/zuma-shusky-wcharger.dtsi b/dts/google/zuma-shusky-wcharger.dtsi
index 6356acd..fd44b87 100644
--- a/dts/google/zuma-shusky-wcharger.dtsi
+++ b/dts/google/zuma-shusky-wcharger.dtsi
@@ -41,7 +41,7 @@
samsung,pins = "gph1-4"; /* QI_EN_L */
samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
- samsung,pin-con-pdn = <EXYNOS_PIN_PDN_OUT0>;
+ samsung,pin-con-pdn = <EXYNOS_PIN_PDN_PREV>;
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_NONE>;
};
};
diff --git a/shusky_gki.fragment b/shusky_gki.fragment
index 1147b71..869fc41 100644
--- a/shusky_gki.fragment
+++ b/shusky_gki.fragment
@@ -83,6 +83,7 @@ CONFIG_PHY_EXYNOS_EUSB_REPEATER=m
CONFIG_PCI_EXYNOS_GS=m
CONFIG_PCI_EXYNOS_CAL_ZUMA=m
CONFIG_ECT=m
+CONFIG_ETM2DRAM=m
CONFIG_MFD_S2MPG14=m
CONFIG_MFD_S2MPG15=m
CONFIG_GSOC_PMIC_THERMAL_CAMBRIA=m
@@ -173,11 +174,7 @@ CONFIG_ARM_CMN=m
CONFIG_EXYNOS_PCIE_IOMMU=m
CONFIG_PIXEL_METRICS=m
CONFIG_PIXEL_SUSPEND_DIAG=m
-CONFIG_VH_SCHED_CPU_NR=9
-CONFIG_VH_MIN_CAPACITY_CPU=0
-CONFIG_VH_MID_CAPACITY_CPU=4
-CONFIG_VH_MAX_CAPACITY_CPU=8
-CONFIG_VH_HIGH_CAPACITY_CPU=4
+CONFIG_VH_SCHED_MAX_CPU_NR=9
# CFG80211 & MAC80211 as modules
CONFIG_CFG80211=m
CONFIG_NL80211_TESTMODE=y
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-27 21:46:04 +0000