Merge android14-gs-pixel-5.15-udc-d1 into android14-gs-pixel-5.15-udc-qpr1

SBMerger: 558810260
Change-Id: I73ad664234441d59711866d5d80d928bf41661e6
Signed-off-by: SecurityBot <android-nexus-securitybot@system.gserviceaccount.com>

2 files changed, 16 insertions, 11 deletions

diff --git a/display/panel-google-hk3.c b/display/panel-google-hk3.c
index 0b626cf..467efc7 100644
--- a/display/panel-google-hk3.c
+++ b/display/panel-google-hk3.c
@@ -1628,8 +1628,10 @@ static int hk3_enable(struct drm_panel *panel)
 	const struct drm_display_mode *mode;
 	struct hk3_panel *spanel = to_spanel(ctx);
 	const bool needs_reset = !is_panel_enabled(ctx);
+	bool is_ns = needs_reset ? false : test_bit(FEAT_OP_NS, spanel->feat);
 	struct drm_dsc_picture_parameter_set pps_payload;
 	bool is_fhd;
+	u32 vrefresh;
 
 	if (!pmode) {
 		dev_err(ctx->dev, "no current mode set\n");
@@ -1637,6 +1639,7 @@ static int hk3_enable(struct drm_panel *panel)
 	}
 	mode = &pmode->mode;
 	is_fhd = mode->hdisplay == 1008;
+	vrefresh = drm_mode_vrefresh(mode);
 
 	dev_info(ctx->dev, "%s (%s)\n", __func__, is_fhd ? "fhd" : "wqhd");
 
@@ -1645,6 +1648,17 @@ static int hk3_enable(struct drm_panel *panel)
 	if (needs_reset)
 		exynos_panel_reset(ctx);
 
+	if (ctx->mode_in_progress == MODE_RES_IN_PROGRESS) {
+		u32 te_width_us = hk3_get_te_width_usec(vrefresh, is_ns);
+
+		exynos_panel_wait_for_vsync_done(ctx, te_width_us,
+			EXYNOS_VREFRESH_TO_PERIOD_USEC(vrefresh));
+	} else if (ctx->mode_in_progress == MODE_RES_AND_RR_IN_PROGRESS) {
+		u32 te_width_us = hk3_get_te_width_usec(ctx->last_rr, is_ns);
+
+		exynos_panel_wait_for_vsync_done(ctx, te_width_us,
+			EXYNOS_VREFRESH_TO_PERIOD_USEC(ctx->last_rr));
+	}
 	PANEL_SEQ_LABEL_BEGIN("init");
 	/* DSC related configuration */
 	drm_dsc_pps_payload_pack(&pps_payload,
@@ -1677,9 +1691,6 @@ static int hk3_enable(struct drm_panel *panel)
 	if (pmode->exynos_mode.is_lp_mode) {
 		hk3_set_lp_mode(ctx, pmode);
 	} else {
-		u32 vrefresh = drm_mode_vrefresh(mode);
-		bool is_ns = needs_reset ? false : test_bit(FEAT_OP_NS, spanel->feat);
-
 		hk3_update_panel_feat(ctx, vrefresh, true);
 		hk3_write_display_mode(ctx, mode); /* dimming and HBM */
 		hk3_change_frequency(ctx, pmode);
@@ -2682,12 +2693,6 @@ const struct exynos_panel_desc google_hk3 = {
 	.num_binned_lp = ARRAY_SIZE(hk3_binned_lp),
 	.is_panel_idle_supported = true,
 	.no_lhbm_rr_constraints = true,
-	/*
-	 * After waiting for TE, wait for extra time to make sure the frame start
-	 * happens after both DPU and panel PPS are set and before the next VSYNC.
-	 * This should cover the timing of HS 60/120Hz and NS 60Hz.
-	 */
-	.delay_dsc_reg_init_us = 10000,
 	.panel_func = &hk3_drm_funcs,
 	.exynos_panel_func = &hk3_exynos_funcs,
 	.lhbm_effective_delay_frames = 1,
diff --git a/dts/google/zuma-shusky-usb.dtsi b/dts/google/zuma-shusky-usb.dtsi
index 9470ddf..583943e 100644
--- a/dts/google/zuma-shusky-usb.dtsi
+++ b/dts/google/zuma-shusky-usb.dtsi
@@ -45,12 +45,12 @@
 
 	repeater_tune2 {
 		tune_name = "u_tx_adjust_port1";
-		tune_value = <0x70 0x73 0x0 0xff>;
+		tune_value = <0x70 0x76 0x0 0xff>;
 	};
 
 	repeater_tune3 {
 		tune_name = "u_hs_rx_pre_emphasus_p1";
-		tune_value = <0x71 0x38 0x0 0xff>;
+		tune_value = <0x71 0x2c 0x0 0xff>;
 	};
 
 	repeater_tune4 {