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| author | Midas Chien <midaschieh@google.com> | 2023-07-12 11:57:58 +0000 |
|---|---|---|
| committer | Midas Chien <midaschieh@google.com> | 2023-07-14 06:50:48 +0000 |
| commit | cb95032b96d69242bafcfda14cab7a9606b0d98c (patch) | |
| tree | 8a1544ec09679c1bd5a412aa2750be7ce053bcb1 | |
| parent | cb6b6ef4e0ca43d152f1f337ca9bbb07187cb7da (diff) | |
| download | shusky-cb95032b96d69242bafcfda14cab7a9606b0d98c.tar.gz | |
display: shoreline: set DSC settings before Sleep Out
Follow OPC to set DSC settings before Sleep Out.
Bug: 290857419
Test: boot, suspend/resume
Change-Id: Id56eb0bb1d81b9688f0f894edbea60e1f198ad37
Signed-off-by: Midas Chien <midaschieh@google.com>
| -rw-r--r-- | display/panel-google-shoreline.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/display/panel-google-shoreline.c b/display/panel-google-shoreline.c index e640b53..7316db9 100644 --- a/display/panel-google-shoreline.c +++ b/display/panel-google-shoreline.c @@ -531,6 +531,11 @@ static int shoreline_enable(struct drm_panel *panel) exynos_panel_reset(ctx); + /* DSC related configuration */ + drm_dsc_pps_payload_pack(&pps_payload, &pps_config); + exynos_dcs_compression_mode(ctx, 0x1); /* DSC_DEC_ON */ + EXYNOS_PPS_WRITE_BUF(ctx, &pps_payload); + EXYNOS_DCS_WRITE_SEQ_DELAY(ctx, 5, MIPI_DCS_EXIT_SLEEP_MODE); if (ctx->panel_rev < PANEL_REV_DVT1) @@ -546,11 +551,6 @@ static int shoreline_enable(struct drm_panel *panel) shoreline_lhbm_gamma_write(ctx); - /* DSC related configuration */ - drm_dsc_pps_payload_pack(&pps_payload, &pps_config); - exynos_dcs_compression_mode(ctx, 0x1); /* DSC_DEC_ON */ - EXYNOS_PPS_WRITE_BUF(ctx, &pps_payload); - shoreline_update_wrctrld(ctx); /* dimming and HBM */ ctx->enabled = true; |