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authorIkjoon Jang <ikjn@google.com>2023-04-23 12:28:28 +0000
committerIkjoon Jang <ikjn@google.com>2023-05-04 01:41:01 +0000
commit16f949db6e53f0843a0703ce9f5c21d8ebf6b16e (patch)
tree96a81d0b575d48b083e4de4c3df3ad9d35591cef
parent7cce9f427f48648f9c8f723fca496bfb4e4d5cb9 (diff)
downloadeos-16f949db6e53f0843a0703ce9f5c21d8ebf6b16e.tar.gz
dts: uwb: Pull CS high in sleep
This is based on QCOM's example for qupv3_se4_spi_pins. Bug: 277176985 Test: UWB factory test with LOW_POWER_MODE Change-Id: I65b03f3ebb0af4ebb18a8d11f02703ef34e88708 Signed-off-by: Andrew Evans <andrewevans@google.com> Signed-off-by: Ikjoon Jang <ikjn@google.com>
-rw-r--r--dts/google/eos-uwb-v2.dtsi26
1 files changed, 26 insertions, 0 deletions
diff --git a/dts/google/eos-uwb-v2.dtsi b/dts/google/eos-uwb-v2.dtsi
index ce33e50..eaeb22e 100644
--- a/dts/google/eos-uwb-v2.dtsi
+++ b/dts/google/eos-uwb-v2.dtsi
@@ -5,6 +5,7 @@
#size-cells = <0>;
status = "ok";
+ pinctrl-1 = <&qupv3_se3_spi_sleep>, <&qupv3_se3_spi_cs_sleep>;
sr100@0 {
compatible = "nxp,sr100";
status = "ok";
@@ -21,6 +22,31 @@
};
};
+&qupv3_se3_spi_sleep {
+ mux {
+ pins = "gpio14", "gpio15", "gpio16";
+ };
+
+ config {
+ pins = "gpio14", "gpio15", "gpio16";
+ };
+};
+
+&qupv3_se3_spi_pins {
+ qupv3_se3_spi_cs_sleep: qupv3_se3_spi_cs_sleep {
+ mux {
+ pins = "gpio17";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio17";
+ drive-strength = <6>;
+ bias-pull-up;
+ };
+ };
+};
+
&tlmm {
uwb_pins {
uwb_gpio_out_active: uwb-gpio-out-active {