gpu: fixed hiu bus addr on 4.9 kernel[1/2]

PD#159303: this may cause the suspend to ram crash at mali modules

Change-Id: Ic328f8abca4a39bdb1321f379fbfc63626f6e875

7 files changed, 8 insertions, 8 deletions

diff --git a/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r11p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r12p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r14p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r15p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/midgard/r16p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
index 26bd614..35249a5 100644
--- a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
+++ b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
@@ -506,7 +506,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
diff --git a/utgard/platform/meson_bu/mali_clock.c b/utgard/platform/meson_bu/mali_clock.c
index 18076ac..b208f3d 100644
--- a/utgard/platform/meson_bu/mali_clock.c
+++ b/utgard/platform/meson_bu/mali_clock.c
@@ -236,7 +236,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);
@@ -527,7 +527,7 @@ int mali_dt_info(struct platform_device *pdev, struct mali_plat_info_t *mpdata)
 	mpdata->scale_info.minclk = mpdata->cfg_min_clock;
 	_dev_info(&pdev->dev, "min clk  is %d\n", mpdata->scale_info.minclk);
 
-	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 1);
+	mpdata->reg_base_hiubus = of_iomap(gpu_dn, 3);
 	_dev_info(&pdev->dev, "hiu io source  0x%p\n", mpdata->reg_base_hiubus);
 
 	mpdata->reg_base_aobus = of_iomap(gpu_dn, 2);