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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2018-02-08 00:29:09 +0800 |
|---|---|---|
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | 2018-02-08 00:35:58 +0800 |
| commit | 39049e00d3cbd2f095ced2fa3928cabeb052ead5 (patch) | |
| tree | 035c41779ad977bdaf43cb75cdaf22e57867109c | |
| parent | d9243970e87230f72086b8c7284022f970329c98 (diff) | |
| download | OpenPlatformPkg-39049e00d3cbd2f095ced2fa3928cabeb052ead5.tar.gz | |
Platforms/Hisilicon: fix arrow keys in release build
The key is in the receive FIFO in PL011 driver. This driver supports
of 1, 16 or 32 chars.
Arrow key is presented as 3 chars. For example, DOWN key is "~[B".
By default, PcdUartDefaultReceiveFifoDepth is fixed at 1. It means
that arrow key is truncated. So it can't be worked well.
After updating to 0, the FIFO depth will be set either 16 or 32 chars.
The logic is in below.
HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) \
> PL011_VER_R1P4) \
? 32 : 16 ;
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
| -rw-r--r-- | Platforms/Hisilicon/HiKey/HiKey.dsc | 1 | ||||
| -rw-r--r-- | Platforms/Hisilicon/HiKey960/HiKey960.dsc | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/Platforms/Hisilicon/HiKey/HiKey.dsc b/Platforms/Hisilicon/HiKey/HiKey.dsc index 28bc47d..6a10988 100644 --- a/Platforms/Hisilicon/HiKey/HiKey.dsc +++ b/Platforms/Hisilicon/HiKey/HiKey.dsc @@ -315,6 +315,7 @@ DEFINE SERIAL_BASE = 0xF7113000 # UART3
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE)
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
gArmPlatformTokenSpaceGuid.PL011UartInteger|10
gArmPlatformTokenSpaceGuid.PL011UartFractional|26
diff --git a/Platforms/Hisilicon/HiKey960/HiKey960.dsc b/Platforms/Hisilicon/HiKey960/HiKey960.dsc index bf02a29..3715209 100644 --- a/Platforms/Hisilicon/HiKey960/HiKey960.dsc +++ b/Platforms/Hisilicon/HiKey960/HiKey960.dsc @@ -311,6 +311,7 @@ DEFINE SERIAL_BASE = 0xFFF32000
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE)
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
gArmPlatformTokenSpaceGuid.PL011UartInteger|10
gArmPlatformTokenSpaceGuid.PL011UartFractional|26
|